Embedded System Design and Modeling

ECE382N.23, Unique: 17800
Semester: Fall 2024

References

1. A. Gerstlauer, C. Haubelt, A. Pimentel, T. Stefanov, D. Gajski, J. Teich, "Electronic System-Level Synthesis Methodologies," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 28, no. 10, pp. 1517-1530, October 2009.
2. A. Krishnakumar, U. Ogras, R. Marculescu, M. Kishinevsky, T. Mudge, "Domain-Specific Architectures: Research Problems and Promising Approaches," ACM Transactions on Embedded Computing Systems (TECS), vol. 22, no. 2, pp. 28:1-28:26, January 2023.
3. E. A. Lee, "The Problem with Threads," IEEE Computer, vol. 39, no. 5, pp. 33-42, May 2006.
4. E. S. Alcorta, A. Gerstlauer, "Learning-based Phase-aware Multi-core CPU Workload Forecasting," ACM Transactions on Design Automation of Electronic Systems (TODAES), 2022.
5. L. Li, T. Flynn, A. Hoisie, "Learning Generalizable Program and Architecture Representations for Performance Modeling," Supercomputing Conference (SC), November 2024.
6. X. Zheng, L. K. John, A. Gerstlauer, "LACross: Learning-Based Analytical Cross-Platform Performance and Power Prediction," International Journal of Parallel Programming (IJPP), vol. 45, no. 6, pp. 1488-1514, December 2017.
7. A. K. Ananda Kumar, S. Alsalamin, H. Amrouch, A. Gerstlauer, "Machine Learning-Based Microarchitecture-Level Power Modeling of CPUs," IEEE Transactions on Computers (TC), vol. 72, no. 4, pp.941–961, April 2023.
8. Y. Zhou, H. Ren, Y. Zhang, B. Keller, B. Khailany, Z. Zhang, "PRIMAL: Power Inference using Machine Learning," Design Automation Conference (DAC), June 2019.
9. O. Bringmann, W. Ecker, A. Gerstlauer, A. Goyal, D. Mueller-Gritschneder, P. Sasidharan, S. Sing, "The Next Generation of Virtual Prototyping: Ulta-fast Yet Accurate Simulation of HW/SW Systems," Design, Automation and Test in Europe (DATE), March 2015.
10. S. E. Arda, A. Krishnakumar, A. A. Goksoy, N. Kumbhare, J. Mack, A. L. Sartor, A. Akoglu, R. Marculescu, U. Y. Ogras, "DS3: A System-Level Domain-Specific System-on-Chip Simulation Framework, IEEE Transactions on Computers (TC), vol. 69, no. 8, August 2020.
11. B. Boroujerdian, Y. Jing, D. Tripathy, A. Kumar, L. Subramanian, L. Yen, V. Lee, V. Venkatesan, A. Jindal, R. Shearer, V. J. Reddi, "FARSI: An Early-stage Design Space Exploration Framework to Tame the Domain-specific System-on-chip Complexity," ACM Transactions on Embedded Computing Systems (TECS), vol. 22, no. 2, pp. 31:1-31:35, January 2023.
12. A. K. Singh, M. Shafique, A. Kumar, J. Henkel, "Mapping on Multi/Many-core Systems: Survey of Current and Emerging Trends," Design Automation Conference (DAC), June 2013.
13. M. Gries, "Methods for Evaluating and Covering the Design Space During Early Design Development," Integration VLSI Journal, vol. 38, no. 2, pp. 131-183, December 2004.
14. A. Deshwal, N. K. Jayakodi, B. K. Joardar, J. R. Doppa, P. P. Pande, "MOOS: A Multi-Objective Design Space Exploration and Optimization Framework for NoC Enabled Manycore Systems," ACM Transactions on Embedded Computing Systems (TECS), vol. 18, no. 5s, pp. 77:1-77:23, October 2019.
15. E. S. Alcorta, A. Gerstlauer, C. Deng, Q. Sun, Z. Zhang, C. Xu, L. Wu Wills, D. Sánchez Lopera, W. Ecker, S. Garg, J. Hu, "Special Session: Machine Learning for Embedded System Design," International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), September 2023.
16. Y. Hu, M. Mettler, D. Mueller-Gritschneder, T. Wild, A. Herkersdorf, U. Schlichtmann, "Machine Learning Approaches for Efficient Design Space Exploration of Application-Specific NoCs," ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 25, no. 5, pp. 1-27, August 2020.
17. H. Mao, M. Alizadeh, I. Menache, S. Kandula, "Resource Management with Deep Reinforcement Learning," ACM Workshop on Hot Topics in Networks (HotNets), November 2016.
18. X. Zhao, T. Gao, A. Zhao, Z. Bi, C. Yan, F. Yang, S.-G. Wang, D. Zhou, X. Zeng, "ROI-HIT: Region of Interest-driven High-dimensional Microarchitecture Design Space Exploration," International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), October 2024.
19. Q. Huang, C. Hong, J. Wawrzynek, M. Subedar, Y. S. Shao, "Learning A Continuous and Reconstructible Latent Space for Hardware Accelerator Design," International Symposium on Performance Analysis of Systems and Software (ISPASS), June 2022.
     

Example Projects

• Previous projects resulting from this class:
  • A. K. Ananda Kumar, A. Gerstlauer, "Learning-Based CPU Power Modeling," Proceedings of the ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Canmore, Canada, September 2019.
  • K. M. Barijough, Z. Zhao, A. Gerstlauer, "Quality/Latency-Aware Real-time Scheduling of Distributed Streaming IoT Applications," ACM Transactions on Embedded Computing Systems (TECS), Special Issue on Embedded Systems Week (ESWEEK), International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), October 2019.
  • K. Punniyamurthy, B. Boroujerdian, A. Gerstlauer, "GATSim: Abstract Timing Simulation of GPUs," Proceedings of the Design, Automation and Test in Europe (DATE) Conference, Lausanne, Switzerland, March 2017.
  • X. Zheng, P. Ravikumar, L. K. John, "Learning-based Analytical Cross-Platform Performance Prediction," Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), Samos, Greece, July 2015. (best paper award)
  • S. Lee, K. Saleem, J. Li, "Fine Grain Word Length Optimization for Dynamic Precision Scaling in DSP Systems," Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Istanbul, Turkey, October 2013. (best paper candidate)
  • A. Abdel-Hadi, J. Michel, S. Vishwanath, "Real-Time Optimization of Video Transmission in a Network of AAVs," Proceedings of the IEEE Vehicular Technology Conference (VTC), San Francisco, CA, September 2011.
  • J. Lin, A. Srivasta, B. L. Evans, "Heterogeneous Multiprocessor Mapping for Real-time Streaming Systems," Proceedings of the IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Prague, Czech Republic, May 2011.
  • A. Pedram, D. Craven, T. Amimeur, "Modeling Cache Effects at the Transaction Level," International Embedded Systems Symposium (IESS), Langenargen, Germany, September 2009. (best paper runner-up)
  • A. Banerjee, "Transaction Level Modeling of Best-Effort Channels for Networked Embedded Devices," International Embedded Systems Symposium (IESS), Langenargen, Germany, September 2009.
     

Supplemental Information

• Prof. Brian Evan's (UT Austin) lecture notes for EE382C Embedded Software Systems
• Prof. Edward Lee's (UC Berkeley) lecture notes for EECS219D Concurrent Models of Computation
• Prof. Lothar Thiele's (ETH Zürich) lecture notes on Hardware/Software Codesign
• Prof. Hanxleden's (Kiel Univ., Germany) lecture notes on Synchronous Languages
  • Additional lecture notes on the Semantics of Statecharts
• Prof. Stephen Edwards' (Columbia Univ.) lecture notes for COMS W4995-02 Languages for Embedded System Design
   

Reference Material

• Technical writing
  • IEEE Authoring Tools and Templates including IEEE Transactions paper template.
  • Prof. Stephen A. Edwards' guide on writing scholarly papers.
  • Another guide for writing technical articles from Columbia University.
  • Tips for writing technical papers from Stanford's InfoLab.
     

Links

• Conferences
  • Design, Automation and Test in Europe (DATE)
  • International Conference on Hardware-Software Codesign and System Synthesis (CODES+ISSS) as part of the Embedded Systems Week (ESWEEK)
  • Asia and South Pacific Design Automation Conference (ASPDAC)
  • Design Automation Conference (DAC)
  • International Conference on Computer Aided Design (ICCAD)
     
• Related courses at UT Austin
  • ECE382M.20: System-On-Chip (SoC) Design
  • ECE382N.4: Advanced Embedded Micro-Controller Systems
  • EE382C: Embedded Software Systems
     
• Related courses at other universities
  • UC Irvine, EECS222: Embedded System Modeling
  • Northeastern University: High-Level Design of Hardware/Software Systems
  • Colorado State, CS/ECE561: Hardware/Software Design of Embedded Systems