Week | Topic | Notes | Reading | Assignments | ||||
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1 Aug 29 |
Introduction | Lecture 1 |
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- | ||||
2 Sep 3, 5 |
Dataflow Processing (Mark McDermott) System-level design methodologies |
Dataflow Proc. Lecture 2 |
|
Lab #1 | ||||
3 Sep 10, 12 |
System Specification, Models of Computation (MoCs) | Lecture 3 |
|
Homework #1 | ||||
4 Sep 17, 19 |
Process-based MoCs: process networks, dataflow | Lecture 4 |
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5 Sep 24, 26 |
State-based MoCs: hierarchical & concurrent state machines | Lecture 5 |
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6 Oct 1, 3 |
System-level design languages: discrete event, synchronous reactive | Lecture 6 |
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7 Oct 8, 10 |
System refinement & implementation modeling | Lecture 7 |
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Homework #2 | ||||
8 Oct 15, 17 |
Analysis of Hardware/Software Design (Milos Gligoric) Communication Systems Design (Jacob Kornerup, National Instruments) |
  Comm. Sys. Des. | Lab #2 | |||||
9 Oct 22, 24 |
Host-compiled computation and transaction-level communication models | Lecture 8 |
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10 Oct 29, 31 |
System synthesis & decision making | Lecture 9 |
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Homework #3 | ||||
11 Nov 5, 7 |
Mapping & design space exploration | Lecture 10 |
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12 Nov 12, 14 |
Review, Midterm | Previous Exams | ||||||
13 Nov 19, 21 |
Estimation and Evaluation | Lecture 11 |
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14 Nov 26 |
System-Level Design Tools, Thanksgiving Holiday | Lecture 12 |
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15 Dec 3, 5 |
Project Presentations |
|
Project Report |
Contents © Copyright 2019 Andreas Gerstlauer | http://www.ece.utexas.edu/~gerstl/ee382n_f19 |