System-on-a-Chip (SoC) Design

EE382V, Unique: 17450
Semester: Fall 2014

Description

With technological advances that allow us to integrate complete multi-processor systems on a single die, Systems-on-Chip (SoCs) are at the core of most embedded computing and consumer devices, such as cell phones, media players and automotive, aerospace or medical electronics. This course will provide an understanding of the concepts, issues, and process of designing highly integrated SoCs following systematic hardware/software co-design & co-verification principles. Specifically, the class project involves taking public domain C++ code for a DRM (Digital Radio Mondiale) PC-based software-defined radio (SDR) system and mapping it to an ARM-based virtual and FPGA prototyping platform using state-of-the-art synthesis and verification tools and design flows.
 

Goals

This course is designed for students to learn and be able to:

• Analyze the functional and nonfunctional performance of the system early in the design process to support design decisions.
• Analyze hardware/software tradeoffs, algorithms, and architectures to optimize the system based on requirements and implementation constraints.
• Describe architectures for control-dominated and data-dominated systems and real-time systems.
• Understand hardware, software, and interface synthesis.
• Understand issues in interface design.
• Use co-simulation to validate system functionality.
• Describe examples of applications and systems developed using a co-design approach.
• Appreciate issues in system-on-a-chip design associated with co-design, such as intellectual property, reuse, and verification.
   

Topics

Likely to be covered in class:

• System-level and SoC design methodologies and tools;
• HW/SW Co-design: analysis, partitioning, real-time scheduling, hardware acceleration;
• Virtual platform models, co-simulation and FPGAs for prototyping of HW/SW systems;
• Transaction-Level Modeling (TLM) and Electronic System-Level (ESL) languages: SystemC;
• High-Level Synthesis (HLS): allocation, scheduling, binding, resource sharing, pipelining;
• SoC and IP integration, verification and test.
   

Prerequisites

• Working knowledge of C and C++, including software development and debugging (e.g., EE322C Data Structures, or equivalent);
• Embedded real-time system design and hardware/software interfacing (e.g., EE345M Embedded & Real-Time Systems, or equivalent);
• Digital hardware design and hardware description languages (e.g., EE360M Digital System Design using VHDL, or equivalent);
• It is helpful to have some basic knowledge of communication systems.
   

Textbooks

No textbook required. Optional textbooks related to class material:

• P. Marwedel, Embedded System Design: Embedded Systems Foundations of Cyber-Physical Systems, Springer, 2011. (author's website)
• D. Black, J. Donovan, B. Bunton, A. Keist, SystemC: From the Ground Up, Second Edition, Springer, 2010.
• G. De Micheli, Synthesis and Optimization of Digital Circuits, McGraw-Hill, 1994.
   

Policies

• Grading
  • 15% Homeworks
  • 20% Exam
  • 30% Labs
  • 35% Final project
  Late penalty: 20% per day (24 hours)
   
• Academic dishonesty
  • Oral discussion of homework problems is encouraged. However, be sure to submit your own individual and independent solution.
  • Labs and final projects will be done in teams. Collaboration on projects is encouraged and desired.
  • Copying of any part of a homework, lab or project solution without explicit reference to its source is plagiarism and considered cheating.
     

Electronic Mail Notification Policy

In this course e-mail will be used as a means of communication with students. You will be responsible for checking your e-mail regularly for class work and announcements. The complete text of the University electronic mail notification policy and instructions for updating your e-mail address are available at http://www.utexas.edu/its/policies/emailnotify.html.
 

Use of Canvas and Class Web Site

This course uses the class web page and Canvas to distribute course materials, to communicate and collaborate online, to submit assignments and to post solutions and grades. You will be responsible for checking the class web page and the Canvas course site regularly for class work and announcements. As with all computer systems, there are occasional scheduled downtimes as well as unanticipated disruptions. Notification of disruptions will be posted on the Canvas login page. Scheduled downtimes are not an excuse for late work. However, if there is an unscheduled downtime for a significant period of time, I will make an adjustment if it occurs close to the due date.
 

Students with disabilities

The University of Texas at Austin provides upon request appropriate academic accommodations for qualified students with disabilities. For more information, contact the Office of the Dean of Students at 471-6259, 471-4641 TTY or the College of Engineering Director of Students with Disabilities at 471-4382.
 

Religious Holidays

Religious holy days sometimes conflict with class and examination schedules. If you miss an examination, work assignment, or other project due to the observance of a religious holy day you will be given an opportunity to complete the work missed within a reasonable time after the absence. It is the policy of The University of Texas at Austin that you must notify each of your instructors at least fourteen days prior to the classes scheduled on dates you will be absent to observe a religious holy day.