Spring 2010: EE 382N-4   Unique: 16820

Advanced Embedded Systems Architecture

Lab Assignment #3: Due Apr 25, 2010

AIM: Perform CRC of the 16 MB on-board flash while varying the ARM system clock.

Note: This is a group lab exercise and every group should demonstrate the working of the code on the board. A team can have a maximum of two members.

Specification:

Flash memory is mapped into the ARM’s address space. You need to perform CRC (Circular Redundancy Check) on this memory (testing range 16 MB: 0xC8000000 to 0xC8FFFFFF), change the system clock frequency and perform the CRC again. This process needs to be done multiple times, without crashing the system. Any CRC algorithm can be used, we recommend CRC-16. The details about the clock control registers can be found in chapter 6 of MC9328MX21RM.pdf.

The frequency needs to be changed to different frequencies (208, 240, 32, 128, 256) MHz in that order and the CRC computation time reported. Note that when the frequency changes the serial port frequency will also change, hence the hyper-terminal will not work. You need to change the serial port setting such that the hyper-terminal works.

Implementation details:

1) Modify the mx21_gpio device driver code to do the following:

a. Modify the address range such that it falls in the PLL, clock and reset control registers.

b. Provide functions to read and write into the various clock control registers.

2) Write a user application code which does the following:

a. Read the contents of the memory mapped flash through your device driver

b. Perform the CRC

c. Change the frequency of the system clock by writing into the clock control registers. Change other settings such that the hyperterminal works (does not crash).

d. Read the flash through your device driver and perform the CRC again

e. Repeat these steps for the five target frequencies.

3) Next, use the mmap routine to read the flash memory. This will not require a device driver. An example of this style of access is given in example.c file. Perform the CRC check as in (2) for the flash for the 5 frequencies.

4) Report the data transfer time and the computation time for the CRC checks (for all 5 frequencies) for both the device driver and the mmap styles of accessing memory.

5) Now, pass the data read from the flash memory by the software to the hardware (FPGA) and perform the CRC computation in the hardware. Use the interrupt to signal completion of the CRC computation. Report the CRC computation time for all the 5 frequencies.

Note: The Linux system should not crash when you change the clock frequency.

Deliverables: The code (user application, device driver, Makefile, top.v) and your report must be zipped and submitted through the assignment section of Blackboard. Please refrain from sending them as attachments through email.