Fall 2009: EE 382N-4 Unique: 16695
Advanced Embedded Systems Architecture
Lab Assignment #3:
Due Apr 17th, 2009
AIM: Perform CRC of the 16 MB on-board flash
while varying the ARM system Clock.
Note: This is a
individual lab exercise and every person should demonstrate the working of the
code on the board.
Specification:
The
LL5500 has an on-board 16 MB flash memory. The flash is memory mapped into the
ARM’s address space (0xC8000000 to 0xC8FFFFFF) similar to the FPGA block RAMs.
You need to perform CRC (Circular Redundancy Check) on this memory, change the
system clock frequency and perform the CRC again. This process needs to be done
multiple times, without crashing the system. Any CRC algorithm can be used, we
recommend CRC-32. The details about the clock control registers can be found in
chapter 6 of MC9328MX21RM.pdf.
The
frequency needs to be changed to at least 4 different frequencies and the
varying clock frequency needs to be demonstrated. Note that when the frequency
changes the serial port frequency will also change hence the hyper-terminal
will not work but you need to change the serial port setting such that the
hyper-terminal works.
All the
required code samples have been given in lab2.
Implementation
details:
1) Modify the
mx21_gpio device driver code to do the following:
a. Modify the address
range such that it falls in the PLL, clock and reset control registers.
b. Provide functions
to read and write into the various clock control registers.
2) Write a user
application code which does the following:
a. Read the memory
mapped flash
b. Perform the CRC
c. Change the
frequency of the system clock. The Serial Peripheral clock should not be
changed.
d. Perform the CRC again
e. Repeat these steps.
Note:
The Linux system should not crash when this is being performed.
Deliverables: The code (user
application, device driver, Makefile, top.v) and your report must be zipped and submitted through
the assignment section of Blackboard. Please refrain from sending them as
attachments through email.