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* Homework 1 Problem 5
* EE 382M-VLSI II
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.option runlvl=6
.option post

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.param VDD = 0.9
.global vdd

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.include "library-22nm.txt"   $ the library of circuit elements
.include "block_22nm.txt"     $ the delay element

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x0 enable OUT n1 nand size0=2*W size1=2*W size2=W size3=W
x1 n1 n2 delaycell
x2 n2 n3 delaycell
x3 n3 n4 delaycell
x4 n4 n5 delaycell
x5 n5 n6 delaycell
x6 n6 n7 delaycell
x7 n7 n8 delaycell
x8 n8 OUT delaycell

v1 vdd 0 dc VDD

*************************************
* you will need to modify the following 
* lines to apply an input stimulus 
* and clock to the circuit
*************************************

Venable enable 0 DC VDD

.END