module GRAM_SRL_3 (P30,PA0,PB0,PC0,PD0,PI0);
  output  P30;
  input   PA0;
  input   PB0;
  input   PC0;
  input   PD0;
  input   PI0;

  wire    l1out;


`ifdef LV

  LV_LSSD2 l1 (.L2(P30), .A(PA0), .B(PB0), .C(PC0), .D(PD0), .I(PI0) );

`else

  PH2P I1 (l1out,PA0,PC0,PI0,PD0);
  PH1P I2 (P30,PB0,l1out);

`endif
endmodule