module GRAM_SRL_4 (P30,PA0,PB0,PI0);
  output  P30;
  input   PA0;
  input   PB0;
  input   PI0;

  wire    l1out;


`ifdef LV

  LV_LSSD l1 (.L2(P30), .B(PB0), .C(PA0), .D(PI0) );

`else

  PH1P l1 (l1out,PA0,PI0);
  PH1P l2 (P30,PB0,l1out);

`endif
endmodule