module PH3P (LOUT, CLK1, CLK2, CLK3, DATA1, DATA2, DATA3);
    input CLK1;
    input CLK2;
    input CLK3;
    input DATA1;
    input DATA2;
    input DATA3;

    wire loutpc1, orclks;

    PH2PC  pc1 (loutpc1, CLK2, CLK3, DATA2, DATA3, LOUT);
    or     o1  (orclks, CLK2, CLK3);

    PH2P   p1  (LOUT, CLK1, orclks, DATA1, loutpc1);

endmodule