Information: Propagating switching activity (low effort zero delay simulation). (PWR-6)
Warning: There is no defined clock in the design. (PWR-80)
Warning: Design has unannotated primary inputs. (PWR-414)
 
****************************************
Report : power
        -analysis_effort low
Design : or1200_alu
Version: B-2008.09-SP4
Date   : Tue Oct 19 14:27:18 2010
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Library(s) Used:

    typical (File: /home/projects/courses/fall_10/ee382m-16947/Artisan/synopsys/typical.db)


Operating Conditions: typical   Library: typical
Wire Load Model Mode: Inactive.


Global Operating Voltage = 1.8  
Power-specific unit information :
    Voltage Units = 1V
    Capacitance Units = 1.000000pf
    Time Units = 1ns
    Dynamic Power Units = 1mW    (derived from V,C,T units)
    Leakage Power Units = 1pW

Warning: Can not report correlated power unless power prediction mode is set. (PWR-727)
Power Breakdown
---------------

                             Cell        Driven Net  Tot Dynamic      Cell
                             Internal    Switching   Power (mW)       Leakage
Cell                         Power (mW)  Power (mW)  (% Cell/Tot)     Power (pW)
--------------------------------------------------------------------------------
Netlist Power                  10.6082     13.1209   2.373e+01 (45%)  2.044e+05
Estimated Clock Tree Power   N/A         N/A          (N/A)           N/A
--------------------------------------------------------------------------------
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