Index of /~mcdermot/vlsi1/VLSI2_SP_2017/synopsys/reference_flows/FP/rm_icc_scripts

[ICO]NameLast modifiedSizeDescription

[PARENTDIR]Parent Directory   -  
[   ]check_icc_rm_values.tcl2011-01-18 17:33 414  
[   ]chip_finish_icc.tcl 2011-01-18 17:33 8.6K 
[   ]clock_opt_cts_icc.tcl 2011-01-18 17:33 6.0K 
[   ]clock_opt_psyn_icc.tcl 2011-01-18 17:33 4.6K 
[   ]clock_opt_route_icc.tcl2011-01-18 17:33 3.4K 
[   ]common_cts_settings_..>2011-01-18 17:33 2.9K 
[   ]common_optimization_..>2011-01-18 17:33 2.5K 
[   ]common_placement_set..>2011-01-18 17:33 1.3K 
[   ]common_post_cts_timi..>2011-01-18 17:33 1.1K 
[   ]common_route_si_sett..>2011-01-18 17:33 3.5K 
[   ]eco_icc.tcl 2011-01-18 17:33 3.1K 
[   ]fm.tcl 2011-01-18 17:33 9.2K 
[   ]focal_opt_icc.tcl 2011-01-18 17:33 3.5K 
[   ]init_design_icc.tcl 2011-01-18 17:33 13K 
[   ]insert_mv_filler_cel..>2011-01-18 17:33 1.5K 
[   ]interclock_delay_opt..>2011-01-18 17:33 250  
[   ]latency_adjustment_o..>2011-01-18 17:33 75  
[   ]mcmm.scenarios.example 2011-01-18 17:33 7.3K 
[   ]metal_fill_icc.tcl 2011-01-18 17:33 4.6K 
[   ]mv_pg_connect.tcl 2011-01-18 17:33 329  
[   ]mv_setup_design.tcl 2011-01-18 17:33 4.5K 
[   ]outputs_icc.tcl 2011-01-18 17:33 3.3K 
[   ]place_opt_icc.tcl 2011-01-18 17:33 8.6K 
[   ]route_icc.tcl 2011-01-18 17:33 5.1K 
[   ]route_opt_icc.tcl 2011-01-18 17:33 5.3K 
[   ]signoff_opt_icc.tcl 2011-01-18 17:33 4.2K