*****************************************
*inverter
****************************************

.macro inv IN OUT Wp=32n Lp=32n Wn=32n  Ln=32n

M1 OUT IN vdd vdd pmos L=Lp W=Wp
M2 OUT IN 0 0 nmos L=Ln W=Wn

.eom

*****************************************
* CMOS transmission gate
*****************************************

.macro tgate IN OUT C Cb Wp=0.14u Wn=0.14u

M1 IN Cb OUT vdd pmos L=32n W=Wp
M2 IN C OUT 0 nmos L=32n W=Wn

.eom

*****************************************
* NMOS load
*****************************************

.macro load out Wn=0.32u

M2 0 out 0 0 nmos W=Wn L=32n m=1

.eom

*****************************************
*feedback
****************************************

.macro fdbk pmos0_g pmos1_g nmos0_g nmos1_g OUT Wp=32n Wn=32n

M1 n0 pmos0_g vdd vdd pmos L=32n W=Wp
M2 OUT pmos1_g n0 vdd pmos L=32n W=Wp
M3 OUT nmos0_g n1 0 nmos L=32n W=Wn
M4 n1 nmos1_g 0 0 nmos L=32n W=Wn

.eom

$****************************************************************************
$ Block: dff_a
$****************************************************************************
.macro dff_a din clk out
M1 din clkn0 m_ic 0 nmos W=140n L=32n
X1 m_ic net2 inv Wp=280n Wn=210n 
X2 net2 m_ic inv Wp=140n Lp=200n Wn=110n Ln=200n
X3 clk clkn0 inv Wp=140n Wn=110n
M2 net2 clk s_ic 0 nmos W=140n L=32n
X4 s_ic net4 inv Wp=0.7u Wn=0.54u
X5 net4 s_ic inv Wp=140n Lp=200n Wn=110n Ln=200n
X6 net4 out inv Wp=2.1u Wn=1.6u
X7 out load Wn=9u
.eom

$****************************************************************************
$ Block: dff_b
$****************************************************************************
.macro dff_b din clk out
X1 din net1 inv Wp=560n Wn=280n
X2 net1 m_ic clkn0 clk tgate Wp=0.14u Wn=0.14u
X3 clk clkn0 inv Wp=280n Wn=210n
X4 m_ic net3 inv Wp=560n Wn=280n 
X5 net3 m_ic inv Wp=140n Lp=200n Wn=110n Ln=200n
X6 net3 s_ic clk clkn0 tgate Wp=0.14u Wn=0.14u
X7 s_ic net5 inv Wp=0.7u Wn=0.54u
X8 net5 s_ic inv Wp=140n Lp=200n Wn=110n Ln=200n
X9 net5 out inv Wp=2.1u Wn=1.6u
X10 out load Wn=9u
.eom

$****************************************************************************
$ Block: dff_c
$****************************************************************************
.macro dff_c din clk out
X1 din net1 inv Wp=280n Wn=210n
X2 net1 m_ic clkn1 clkp0 tgate Wp=0.14u Wn=0.14u
X3 clk clkn0 inv Wp=100n Wn=80n
X4 clkn0 clkp0 inv Wp=100n Wn=80n
X5 clkp0 clkn1 inv Wp=140n Wn=110n
X6 m_ic net3 inv Wp=280n Wn=210n
X7 net3 s_ic clk clkn0 tgate Wp=0.14u Wn=0.14u
X8 net3 clkn0 clkp1 net3 m_ic fdbk Wp=140n Wn=140n
X9 clkn0 clkp1 inv Wp=140n Wn=110n
X10 s_ic net5 inv Wp=140n Wn=110n
X11 net5 s_ic inv Wp=140n Lp=200n Wn=110n Ln=200n
X12 s_ic net6 inv Wp=0.7u Wn=0.54u
X13 net6 out inv Wp=2.1u Wn=1.6u
X14 out load Wn=9u
.eom