Instructions: You are encouraged to do homework in groups. Remember to put all group members' names on the solution sheet. Also, remember to put the unique number of the discussion session you want the homework returned back to you. Good luck!!!
 

1. (3.26 with some changes)
Using Figure 3.20 on page 65 in the text, the diagram of the four-entry, three-bit memory, answer the following:

a. To read from the second memory location, what must the values of A[1:0] and WE be?

b. To change the number of entries in the memory from 4 to 60, how many total address lines would be needed? What would the addressability of the memory be after this change was made?

c. Suppose the minimum width (in bits) of the program counter (a special register to be discussed in the next chapter) is the minimum number of bits needed to address all 60 locations in our memory from part B. How many additional memory locations could be added  to this memory without having to alter the width of the program counter?

2. (4.5 with some changes)
The following table represents a small memory. Refer to this table for the following questions.

Address | Data
--------|--------------------
0000    | 0001 1110 0100 0011
0001    | 1111 0000 0010 0101
0010    | 0110 1111 0000 0001
0011    | 0000 0000 0000 0000
0100    | 0000 0000 0110 0101
0101    | 0000 0000 0000 0110
0110    | 1111 1110 1101 0011
0111    | 0000 0110 1101 1001

(Location 0 is the same as address 0000)

a. What binary value does location 3 contain? Location 6? (Write your answer in hex.)

b. In the Von Neumann model, the contents of a memory location can also be an instruction. If the binary pattern in location 0 were interpreted as an instruction, what instruction would it represent?

c. A binary value can also be interpreted as a memory address. Say the value stored in location 5 is a memory address. To which location does it refer? What binary value does that location contain?

3. Changed September 27
Suppose a 32-bit instruction takes the following format:

OPCODE DR SR1 SR0 UNUSED

If there are 225 opcodes, 120 registers

a. What is the minimum number of bits required to represent the OPCODE?

b. What is the minimum number of bits required to represent the Destination Register (DR)?

c. What is the maximum number of UNUSED bits in the instruction encoding?

4. (5.1 with some changes) Updated September 27
Given instructions ADD, JMP, LEA, and STI, identify whether the instructions are operate instructions, data movement instructions, or control instructions.
 

5. Changed September 27
Say we have a memory consisting of 256 locations, and each location contains 16 bits.

a. How many bits are required to reference each location?

b. What is the addressability of this memory?

Problem 6 is taken out of the problem set due to its ambiguity. If you already did it, you won't be graded on it.