Programming Assignment 6
Due: December 8, 2000 11:59 PM
Writing a Simulator
Problem Statement
In this programming assignment, we ask you to write a simulator for
the LC-1 ISA in LC-2 assembly language. You will use the simulator you
write to simulate a program written in LC-1 machine language. The LC-1
is an accumulator-based architecture. Thus, there is only one register.
This register is called the accumulator. Since there is only one register,
there is no need to explicitly specify the accumulator in an LC-1 instruction.
The LC-1 ISA specifies seven instructions. They are Call, Return, Add,
Brn, Load, Store, and Stop. Three bits in the instruction, bits <15:13>,
are used to represent the opcode. The rest of the bits in the instruction,
bits <12:0>, may be used to represent a 13-bit address. The addressing-mode
is direct. The memory space being simulated contains 213 locations,
and the addressibility is 16 bits. The LC-1 ISA has one condition register
which is modified by two of the seven instructions: Add and Load. It is
set when a negative value is stored into the accumulator, otherwise, it
is cleared.
LC-1 Instruction Set
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 0 0 | address13 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 0 1 | 0 0 0 0 0 0 0 0 0 0 0 0 0 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 1 0 | address13 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 1 1 | address13 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 0 0 | address13 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 0 1 | address13 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 1 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 |
+ Sets the n condition register.
Program Details
The simulator that you write in LC-2 assembly language should be placed starting at memory location x3000. The program that you write in LC-1 machine language should be placed starting at memory location x6000. Since an address specified in LC-1 is 13-bits and an address specified in LC-2 is 16-bits, we can not simply use an LC-2 load/store instruction to simulate an LC-1 load/store instruction. To get around this problem, we apply a simple workaround. Append the 3-bit bit pattern, 011, to the front of all LC-1 addresses. For example, suppose you have the following LC-1 instruction,
100 0 0001 0000 0010 ; Load from address 0 0001 0000 0010You can emulate this LC-1 instruction using the LC-2 LDR instruction. First, prepend 011 to the address specified in the the LC-1 Load instruction. This produces the address 011 0 0001 0000 0010. Next, put this value into one of the LC-2 registers, for example, R2. The LC-2 instruction LDR R1, R2, #0 will perform the load, and the result will be stored into R1. Last, R1 should be stored into the accumulator to complete the simulation of the LC-1 Load instruction.
The LC-1 simulator that you write must follow the following guidelines. The PC should be stored in memory location x3100. The accumulator should be stored in memory location x3200. Each time the PC or the accumulator changes during the simulation of the LC-1 program, memory location x3100 or x3200 should be updated to reflect this change.
The stack for the Call and Return instructions should begin at memory location x4000 (ie. the stack pointer should be initialized to x3FFF).
You do not have to check for invalid instructions. You may assume that the LC-1 machine language program contains only valid instructions.
To begin writing your simulator, we suggest starting with the code template shown below. The majority of the work is performed in the subroutine DECODE. The main loop of the simulator calls the FETCH and DECODE subroutines for each LC-1 instruction to simulate.
.ORIG x3000
;=========================
; initialization block
;=========================
; ...
;=======================
; fetch the instruction
;=======================
AGAIN JSR FETCH
;=======================
; decode the instruction
;=======================
JSR DECODE
BRnzp AGAIN;===============================
; subroutine to perform fetch
;===============================
FETCH ; ...
; ...
RET;===============================
; subroutine to perform decode
; and the rest of the
; instruction cycle
;===============================
DECODE ; ...
; ...
RET
.END
How to write the LC-1 program
In a separate file, you should write the LC-1 program using the .FILL pseudo-op. The LC-1 program begins with the line .ORIG x6000 indicating where this program is to be loaded into memory.
.ORIG x6000 ; An LC-1 program which starts at location x6000After loading the main simulator program you have written in LC-2 assembly language, you should load the LC-1 program. Doing so allows you to initialize memory with two programs.
.FILL x8003 ; Load #10 into the accumulator
.FILL x4004 ; Add #20 to the accumulator
.FILL xC000 ; Stop the LC-1 simulator
.FILL #10 ;
.FILL #20 ;
.END
If you decide to do this assignment, please follow the instructions below