>From patt@tick.ece.utexas.edu  Mon Apr  1 23:19:26 2002
Date: Mon, 1 Apr 2002 23:19:25 -0600 (CST)
From: Yale Patt <patt@ece.utexas.edu>
Subject: Re: question regarding microarch

Thank you for your question.

I don't have any good references for you.

Today, most people would undoubtedly opt for simpler decoding at the expense
of not minimizing bandwidth off chip and enduring more cache misses.  

Two things could easily change that, and both are moving in the direction
of changing the "given."  Off-chip latency is getting worse.  On-chip 
transistors, and the ability to do more on the chip, is increasing.  Both
work to make the dense encoding of the ISA more palatable.  Exactly when 
people will prefer that? -- My crystal ball is opaque at the moment.

Yale Patt

        Subject: question regarding microarch

        Dear Prof. Patt

        I had this small question regarding design tradeoffs while designing an
        ISA. 

        In today's design constraints/environment, what is more important -- to
        minimize the inter-chip communication, or to minimize the decode
        complexity? If we choose the first, and go for a dense (=> variable
        length, non-uniform decode) encoding, we do more work inside 
        the processor core, decoding the instructions....

        Am i wrong in inferring that dense encoding necessarily implies loss of
        uniform decode and other such desirable properties? Of course, we wont
        achieve the densest encoding if we want beautiful instructions, but I
        don't have a feel for the point where the trade-off should be made.

        Could you suggest some references.

        Best Regards
        <<name withheld>>