EE 360N Lab Assignments
Fall 2003
- Lab Assignment 5 - due December 5,
11.59pm
- Clarifications
- Sample simulator runs to help you in debugging your simulator
(Each of the hex files were simulated cycle by cycle using the "run 1"
command and an "idump" was performed after each cycle. *.dump files
show the cycle by cycle output of idump. *.state files summarize the
contents of the pipeline latches. *.timeline shows a timeline of the
execution of the program in the pipeline):
Note that these test cases are not meant to be exhaustive. You should
write your own test cases to make sure that your simulator is working
for every instruction and program.
- Submission Instructions
- Lab Assignment 4 - due
November 25 November 30 ,11.59pm
- 23 November 2003 - Updates have been made to the lab
- Please dump the memory locations containing the page table entries once before the 300th cycle.
- Please store the sum at location xC014.
- You can use the following xfig files to show the changes you made to the datapath & state diagram. You can
modify these files using the xfig drawing program installed on LRC UNIX/Linux machines.
Please note that you can submit hand drawn diagrams if you are not comfortable using xfig.
- Submission Instructions
- Please submit the hardcopy of your documentation for this lab in class on Monday.
- Lab Assignment 3 - due
November 2 November 9,11.59pm
- Clarifications Updated 7 November 2003
- Please generate the timer interrupt only once - at cycle 300.
- You can use the following xfig files to show the changes you made to the datapath & state diagram. You can
modify these files using the xfig drawing program installed on LRC UNIX/Linux machines.
Please note that you can submit hand drawn diagrams if you are not comfortable using xfig.
- Submission Instructions
- Please submit the hardcopy of your documentation for this lab in class on Monday
- Lab Assignment 2 - due October 9,
11.59pm
- Lab Assignment 1 - due September 14, 11.59pm