F: Fetch stage
D: Decode stage
A: AGEX stage
M: Memory stage
S: SR stage

		  Cycle             			
Instruction       1  2  3  4  5  6  7  8  9  10 11 12 13 14 15 16 17 18 19 20 21	
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LEA R0, B         F  F  D  A  M  S
LDB R1, R0, #-1         F  D  D  D  D  A  M  S
LDW R2, R0, #0             F  F  F  F  D  A  M  M  S
JMP R2                                 F  D  D  D  D  D  A  M  S
HALT                                                           F  D  A  M  M  S