F: Fetch stage
D: Decode stage
A: AGEX stage
M: Memory stage
S: SR stage

		  Cycle             			
Instruction       1  2  3  4  5  6  7  8  9  10 11 12 13 14 15 16 17 18 19	
--------------------------------------------------------------------------
AND R0, R0, #0	  F  F  D  A  M  S 
ADD R1, R0, #4	        F  D  D  D  D  A  M  S
ADD R2, R1, #3		   F  F  F  F  D  D  D  D  A  M  S  
ADD R3, R1, R2                         F  F  F  F  D  D  D  D  A  M  S
HALT                                               F  F  F  F  D  A  M  S