1st or 2nd memory access

A student asked a question in class today about the signal that says
whether we are doing the first read/write or second read/write.  He 
wanted it to be an output of the logic block, since whether we need
a second write is determined by the low bits of address and the data size.
I told him that it makes more sense to have that bit be one of the control
signals associated with the corresponding states.  What I passed over far
too briefly was the fact that it can NOT be an output of the logic block,
as he suggested.

Let's examine why?

The logic block's purpose is to generate signals to control 

	(a) the LD_EN signals of each of the bytes of the MDR,
	(b) the amount to rotate what is coming off the bus, and
	(c) the WE signals for each chip in memory.

It is true that the data size and Address[1:0] will tell you whether
one needs one or two memory accesses.  BUT these two values do not tell
you WHICH access is being performed in the current cycle.  Which access
(first or second) is being performed this cycle CAN NOT be determined 
from the data size and Address[1:0].  So, it can NOT be an output of
that logic block.  In fact, the value of that signal (1st or 2nd access)
determines which LD_EN signals, how much to rotate, and which WE signals,
if any, to assert this cycle.  Therefore, that signal (1st/2nd) is an
input to that logic block.

So, where does that signal come from?  Answer: it is one of the control
signals associated with the state machine.  So, if we were going to allow
unaligned accesses on the LC-3b, the relevant part of the state machine 
would be as follows:


			 ------- 
			|    	|32
			|    	|
			|    	|
			 ------- 
			    | STW
			    |
			    V
			 ------- 
			|       |7
			|Compute|    X <-- whether we need one access or two
			|   X   |
			 ------- 
			    |
			    |
			    V
			 ------- 
			|    	|23
			|    	|    Load MDR
			|    	|
			 ------- 
			    |
			    |
			    V
			 ------- 
			|    	|16
			| 1st   |    Make the first access.  Branch on whether
			|  [X]	|    you need a second access.
			 ------- 
			   /\
			  /  \
			 .    ------> 18,19
			 |
			 |
		 	 V
		       ------- 
		      |	      |k
		      |MAR ++ |      Set up MAR for second access.
		      |       |
		       ------- 
			  |
			  |
			  V
		       ------- 
		      |  ___  |j
		      |  1st  |      Make the second access.  When done, you
		      |       |      are finished.
		       ------- 
			  \
			   \
			    ------> 18,19

I still need to come up with state numbers for j,k, but that is not relevant
to the point of this message.

OK?
Yale Patt