Instructions:
You are encouraged to work on the problem set in groups and turn
in one problem set for the entire group. Remember to put all
your names on the solution sheet. Also, remember to put the name
of the TA and the time for the discussion section you would like the problem
set turned back to you. Show your work.
The table below is the truth table for a digital circuit with inputs A, B, C and output Y. Prove that this circuit is logically complete by implementing AND, OR and NOT functions using this circuit. Section 3.3.5 on page 64 of your book discusses logical completeness.
A | B | C | Y |
---|---|---|---|
0 | 0 | 0 | 1 |
0 | 0 | 1 | 1 |
0 | 1 | 0 | 0 |
0 | 1 | 1 | 1 |
1 | 0 | 0 | 0 |
1 | 0 | 1 | 1 |
1 | 1 | 0 | 1 |
1 | 1 | 1 | 0 |
(3.41)
The IEEE campus society office sells sodas for 35 cents. Suppose they install a
soda controller that only takes the following three inputs: nickel, dime, and quarter.
After you put in each coin, you push a pushbutton to register the coin. If at least 35
cents has been put in the controller, it will output a soda and proper change (if applicable).
Draw a finite state machine that describes the behavior of the soda controller. Each state
will represent how much money has been put in (Hint: There will be seven of those states).
Once enough money has been put in it, the controller will go to a final state where the person
will receive a soda and proper change (Hint: There are five such final states). From the final state,
the next coin that is put in will start the process again.
(4.4)
What is the word length of a computer? How does the word length of a
computer affect what the computer is able to compute? That is, is it a
valid argument, in light of what you learned in Chapter 1, to say that a
computer with a larger word size can process more information and
therefore is capable of computing more than a computer with a smaller word
size?
(3.31)
If a particular computer has 8 byte addressability and a 4 bit address space,
how many bytes of memory does that computer have?
(Adapted from 3.30)
A comparator circuit has two 1-bit inputs, A and B, and three 1-bit outputs, G (greater), E (equal), and L (less than).
Refer to figures 3.40 and 3.41 in the book for this problem.
Suppose that an instruction cycle of the LC-3 has just finished and another one is about to begin. The following table describes the values in select LC-3 registers and memory locations:
Register | Value |
---|---|
IR | x3001 |
PC | x3003 |
R1 | x3000 |
R2 | x3002 |
Memory Location | Value |
x3000 | x62BF |
x3001 | x3000 |
x3002 | x3001 |
x3003 | x62BE |
For each phase of the new instruction cycle, specify the values that PC
, IR
, MAR
, MDR
, R1
, and R2
will have at the end of the phase in the following table:
PC | IR | MAR | MDR | R1 | R2 | |
---|---|---|---|---|---|---|
Fetch | ||||||
Decode | ||||||
Evaluate Address | ||||||
Fetch Operands | ||||||
Execute | ||||||
Store Result |
Hint: Example 4.2 illustrates the LDR
instruction of the LC-3. Notice that values of memory locations x3000
, 3002
, and 3003
can be interpreted as LDR
instructions.
OPCODE | DR | SR1 | SR2 | UNUSED |
If there are 255 opcodes and 120 registers, and every register is available as a source or destination for every opcode,
OPCODE
?DR
)?UNUSED
bits in the instruction encoding?