Friday, September 18, 2009 11:54 PM,

A number of students commented that the last part of Wednesday's lecture on 
memory was a little too fast.  So here are a few pointers to what I think I 
said, but a little slower.  You should also read Section 3.5 in the book that 
deals with memory, and Figure 3.21 that illustrates a "4 trit" memory. 

What do I mean by "4 trit"?  Answer: 4 locations, each containing one trit of 
information.  (I am defining "trit" here to mean three bits.)  

In class one of the students said his laptop had 4 gigabytes of memory.  
What he meant was 4 billion locations, each containing one byte of 
information.  A byte equals 8 bits.

We identify memory locations by means of addresses in the same way we identify 
the location of houses by the number nailed to the front door.  ...or, post 
office boxes by their PO Box Number.  

We say the number of unique addresses in a memory is its ADDRESS SPACE.  
In the case of my figure in Chapter 3, the address space is four.  In the case 
of 4 gigabytes, the address space is 4 billion.  

We need 2 bits to specify 4 addresses, so we sometimes say the address space 
is 2 bits.  We need 32 bits to specify 4 billion addresses, so we sometimes 
say the address space is 32 bits.

At this point I need to introduce a new term, which I now realize I did not 
introduce before using it in class on Wednesday.  That is inexcusable and I 
apologize.  I guess I was going so fast, no one felt comfortable interrupting 
me.  The term is "register."  It is described in Section 3.4.3 in the book.  A 
register provides the capability of storing n bits, where n can be as small as 
1.  You can think of an n-bit register as n latches, where each latch stores 
one bit.

We have two registers associated with the memory.  First is the Memory Address 
Register (MAR).  We put into the MAR the address of the location in the memory 
whose contents we wish to read.  For an address space of four locations, we 
would need the MAR to be able to store 2 bits.  For an address space of 4 
billion locations, we would need the MAR to be able to store
32 bits of address.

In each memory location we store bits of information.  The number of bits 
stored in a location is referred to as the memory's ADDRESSABILITY.
The memory of Chapter 3 has an addressiblity of 3 bits.  The memory of the 
student's lap top has an addressibly of one byte (8 bits).

Associated with our memory is a Memory Data Register (MDR) for temporarily 
holding the contents of the memory location we are reading from or writing to.
For the four trit memory of Figure 3.21, we would need a 3-bit MDR.  For the 
student's lap top, we would need an 8-bit MDR.

When we wish to read the contents of a memory location, we put the address we 
wish to read from in the MAR and tell the memory to put the contents of the 
location having that address into the MDR.  When we wish to write a value to a 
memory location, we put the address of the location into the MAR, the 
information to be written into the MDR, and tell the memory to put the 
contents of the MDR into the memory location specified by the MAR. 

Hope this helps.  We will talk about this some more on Monday.  

Good luck getting the problem set done.  See you in class on Monday.

Yale Patt