Instructions:
You are encouraged to work on the problem set in groups and turn in one problem set for the entire group. Remember to put all your names on the solution sheet. Also, remember to put the name of the TA and the time for the discussion section you would like the problem set turned back to you. Show your work.

1. (7.2) An LC-3 assembly language program contains the instruction:

     ASCII       LD R1, ASCII

   The symbol table entry for ASCII is x4F08. If this instruction is executed during the running of the program, what will be contained in R1 immediately after the instruction is executed?

   R1 <-- M[ASCII]
   R1 = 0010 001 1 1111 1111
             LD   R1,     #-1




2. (7.10) The following program fragment has an error in it. Identify the error and explain how to fix it. Note: R3 is the only register which should change its value after the program runs.

   	ADD R3, R3, #30	The immediate value is too large.
   	ST R3, A
   	HALT
   A	.BLKW 1

   Will this error be detected when this code is assembled or when this code is run on the LC-3?

   The error will be detected by the assembler since it will not be able to form the 16 bits of the instruction which performs the addition.
   One possible solution is to seperate the addition to two add instruction with immediate of #15.

   	ADD R3, R3, #15
   	ADD R3, R3, #15
   	ST R3, A
   	HALT
   A	.BLKW 1




3. (Adapted from 6.14) Consider the following machine language program:

   	AND R2, R2, #0	R2 <- 0
   LOOP	ADD R1, R1, #-3	R1 <- R1-3
   	BRn END	End when R1 is negative
   	ADD R2, R2, #1	R2 <- R2+1
   	BRnzp LOOP
   END	HALT

   What are the possible initial values of R1 that cause the final value in R2 to be 3?

   For R2 to contain the value 3, the BRn must not have intiated a branch for 3 consecutive times. Therefore, R1 wasn't negative after the instruction ADD R1, R1, #-3 was exectued 3 times and was negative after the instruction was executed 4 times. That is, R1-3x3 = R1-9 >= 0 and R1-3x4 = R1-12 < 0. Solving the inequalities yields, 9 <= R1 < 12. Since a register contains integers, R1 could have been 9, 10, or 11.




4. Updated 10/27/2009. (Adapted from 7.16) Assume a sequence of nonnegative integers is stored in consecutive memory locations, one integer per memory location, starting at location x4000. Each integer has a value between 0 and 30,000 (decimal). The sequence terminates with the value -1 (i.e., xFFFF).
   1. Create the symbol table entries generated by the assembler when translating the following routine into machine code:

      	.ORIG x3000
      	AND R4, R4, #0
      	AND R3, R3, #0
      	LD R0, NUMBERS
      LOOP	LDR R1, R0, #0
      	NOT R2, R1
      	BRz DONE
      	AND R2, R1, #1
      	BRz L1
      	ADD R4, R4, #1
      	BRnzp NEXT
      L1	ADD R3, R3, #1
      NEXT	ADD R0, R0, #1
      	BRnzp LOOP
      DONE	TRAP x25
      NUMBERS	.FILL x4000
      	.END

      Symbol Table

      Label	Memory Address
      LOOP	x3003
      L1	x300A
      NEXT	x300B
      DONE	x300D
      NUMBERS	x300E

      
      
   2. What does the above program do?

      The instruction AND R2, R1, #1 performs a bit mask (x0001) to decide whether the least significant bit of the value is 0 or 1. The LSB of a number is used to determine whether the integer was even or odd. For example, numbers with a zero LSB are: 0000 (#0), 0010 (#2), 0100 (#4), 0110 (#6), which are all even. Hence, R3 counts the amount of even numbers in the list and R4 counts the amount of odd numbers.




5. Below is a segment of LC-3 machine language program.

   	ADD R2, R1, #0
   HERE	ADD R3, R2, #-1
   	AND R3, R3, R2
   	BRz END
   	ADD R2, R2, #1
   	BRnzp HERE
   END	HALT

   If the data in R1 is an unsigned integer larger than 1, what does the program do? (Hint: what is the relationship between the resulting integer in R2 and the original integer in R1?)

   The program finds out the smallest power of 2 which is larger than or equal to the unsigned integer in R1.




6. (Adapted from 7.18) The following LC-3 program compares two character strings of the same length. The source strings are in the .STRINGZ form. The first string starts at memory location x4000, and the second string starts at memory location x4100. If the strings are the same, the program terminates with the value 1 in R5; otherwise the program terminates with the value 0 in R5. Insert one instruction each at (a), (b), and (c) that will complete the program. Note: The memory location immediately following each string contains x0000.

   	.ORIG x3000
   	LD R1, FIRST
   	LD R2, SECOND
   	AND R0, R0, #0
   LOOP	LDR R3, R1, #0	; (a)
   	LDR R4, R2, #0
   	BRz NEXT
   	ADD R1, R1, #1
   	ADD R2, R2, #1
   	NOT R4, R4	; (b)
   	ADD R4, R4, #1	; (c)
   	ADD R3, R3, R4
   	BRz LOOP
   	AND R5, R5, #0
   	BRnzp DONE
   NEXT	AND R5, R5, #0
   	ADD R5, R5, #1
   DONE	TRAP x25
   FIRST	.FILL x4000
   SECOND	.FILL x4100
   	.END




7. Updated 10/29/2009. The data at memory address x3500 is a bit vector with each bit representing whether a certain power plant in the area is generating electricity (bit = 1) or not (bit = 0). The program counts the number of power plants that generate electricity and stores the result at x3501. However, the program contains a mistake which prevents it from correctly counting the number of electricity generating (operational) power plants. Identify it and explain how to fix it.

   	.ORIG x3000
   	AND R0, R0, #0
   	LD R1, NUMBITS
   	LDI R2, VECTOR
   	ADD R3, R0, #1
   CHECK	AND R4, R2, R3
   	BRz NOTOPER
   	ADD R0, R0, #1
   NOTOPER	ADD R3, R3, R3
   	ADD R1, R1, #-1
   	BRp CHECK
   	LD R2, VECTOR	<- missing instruction
   	STR R0, R2, #1
   	TRAP x25
   NUMBITS	.FILL #16
   VECTOR	.FILL x3500
   	.END

   R2 contains the bit vector, and not the address at which the bit vector is contained. The instruction LDI R2, VECTOR loaded the value at x3500 into R2 since the value at the memory address labeled as VECTOR was used as the address from which to load. The store instruction STR R0, R2, #1 uses the value of R2 to evaluate an address. However, R2 must be modified to contain an address for an STR instruction to work. Thus, LD R2, VECTOR is an additional required instruction.




8. Postponed to Problem Set 5 10/30/2009 (Adapted from 6.16) Shown below are the partial contents of memory locations x3000 to x3006.
   
   

   	15															0
   x3000	0	0	1	0	0	0	0
   x3001	0	0	0	1	0	0	0	0	0	0	1	0	0	0	0	1
   x3002	1	0	1	1	0	0	0
   x3003
   x3004	1	1	1	1	0	0	0	0	0	0	1	0	0	1	0	1
   x3005	0	0	0	0	0	0	0	0	0	0	1	1	0	0	0	0
   x3006

   
   
   The PC contains the value x3000, and the RUN button is pushed.
   
   As the program executes, we keep track of all values loaded into the MAR. Such a record is often referred to as an address trace. It is shown below.
   
   MAR Trace
   x3000
   x3005
   x3001
   x3002
   x3006
   x4001
   x3003
   x0021
   
   Your job: Fill in the missing bits in memory locations x3000 to x3006.




9. 1. Bob Computer just bought a fancy new graphics display for his LC-3. In order to test out how fast it is, he rewrote the OUT trap handler so it would not check the DSR before outputting. Sadly he discovered that his display was not fast enough to keep up with the speed at which the LC-3 was writing to the DDR. How was he able to tell?

      Some of the characters written to the DDR weren't being output to the screen.

   2. Bob also rewrote the handler for GETC, but when he typed ABCD into the keyboard, the following values were input:

      
      AAAAAAAAAAAAAAAAABBBBBBBBBBBBBBBBBBBBCCCCCCCCCCCCCCCCCCCDDDDDDDDDDDDDDDDDDDD
      

      What did Bob do wrong?

      The handler didn't check the KBSR before inputting the character.





10. The following program does not do anything useful. However, being an “electronic idiot,” the LC-3 will still execute it.

    
            .ORIG x3000
            LD R0, Addr1
            LEA R1, Addr1
            LDI R2, Addr1
            LDR R3, R0, #-6
            LDR R4, R1, #0
            ADD R1, R1, #3
            ST R2, #5
            STR R1, R0, #3
            STI R4, Addr4
            HALT
    Addr1   .FILL x300B
    Addr2   .FILL x000A
    Addr3   .BLKW 1
    Addr4   .FILL x300D
    Addr5   .FILL x300C
            .END
    
    

    Without using the simulator, answer the following questions:

    1. What will the values of registers R0 through R4 be after the LC-3 finishes executing the ADD instruction?

    R0 - x300B
    R1 - x300D
    R2 - x000A
    R3 - x1263
    R4 - x300B

    2. What will the values of memory locations Addr1 through Addr5 be after the LC-3 finishes executing the HALT instruction?

    Addr1 - x300B
    Addr2 - x000A
    Addr3 - x000A
    Addr4 - x300B
    Addr5 - x300D





11. The LC-3 has just finished executing a large program. A careful examination of each clock cycle reveals that the number of executed store instructions (ST, STR, and STI) is greater than the number of executed load instructions (LD, LDR, and LDI). However, the number of memory write accesses is less than the number of memory read accesses, excluding instruction fetches. How can that be? Be sure to specify which instructions may account for the discrepancy.

    A large number of LDI instructions (two read accesses) and STI instructions (one read access and one write access) could account for this discrepancy.