Instructions:
You are encouraged to work on the problem set in groups and turn
in one problem set for the entire group. Remember to put all
your names on the solution sheet. Also, remember to put the name
of the TA and the time for the discussion section you would like
the problem set turned back to you. Show your work.
  ASCII       LD R1, ASCII
The symbol table entry for ASCII is x4F08. If this instruction is executed during the running of the program, what will be contained in R1 immediately after the instruction is executed?
|   | ADD R3, R3, #30 |
|   | ST R3, A |
|   | HALT |
| A   | .BLKW 1 |
|   | AND R2, R2, #0 |
| LOOP   | ADD R1, R1, #-3 |
|   | BRn END |
|   | ADD R2, R2, #1 |
|   | BRnzp LOOP |
| END   | HALT |
|   | .ORIG x3000 |
|   | AND R4, R4, #0 |
|   | AND R3, R3, #0 |
|   | LD R0, NUMBERS |
| LOOP   | LDR R1, R0, #0 |
|   | NOT R2, R1 |
|   | BRz DONE |
|   | AND R2, R1, #1 |
|   | BRz L1 |
|   | ADD R4, R4, #1 |
|   | BRnzp NEXT |
| L1   | ADD R3, R3, #1 |
| NEXT   | ADD R0, R0, #1 |
|   | BRnzp LOOP |
| DONE   | TRAP x25 |
| NUMBERS   | .FILL x4000 |
|   | .END |
|   | ADD R2, R1, #0 |
| HERE   | ADD R3, R2, #-1 |
| AND R3, R3, R2 | |
| BRz END | |
| ADD R2, R2, #1 | |
| BRnzp HERE | |
| END | HALT |
| .ORIG x3000 | ||
| LD R1, FIRST | ||
| LD R2, SECOND | ||
| AND R0, R0, #0 | ||
| LOOP | ____________________ | ; (a) |
| LDR R4, R2, #0 | ||
| BRz NEXT | ||
| ADD R1, R1, #1 | ||
| ADD R2, R2, #1 | ||
| ____________________ | ; (b) | |
| ____________________ | ; (c) | |
| ADD R3, R3, R4 | ||
| BRz LOOP | ||
| AND R5, R5, #0 | ||
| BRnzp DONE | ||
| NEXT | AND R5, R5, #0 | |
| ADD R5, R5, #1 | ||
| DONE | TRAP x25 | |
| FIRST   | .FILL x4000 | |
| SECOND   | .FILL x4100 | |
| .END |
| .ORIG x3000 | |
| AND R0, R0, #0 | |
| LD R1, NUMBITS | |
| LDI R2, VECTOR | |
| ADD R3, R0, #1 | |
| CHECK   | AND R4, R2, R3 |
| BRz NOTOPER | |
| ADD R0, R0, #1 | |
| NOTOPER   | ADD R3, R3, R3 |
| ADD R1, R1, #-1 | |
| STR R0, R2, #1 | |
| TRAP x25 | |
| NUMBITS   | .FILL #16 |
| VECTOR   | .FILL x3500 |
| .END |
|   | 15 | 0 | ||||||||||||||
| x3000 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |   |   |   |   |   |   |   |   |   |
| x3001 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
| x3002 | 1 | 0 | 1 | 1 | 0 | 0 | 0 |   |   |   |   |   |   |   |   |   |
| x3003 |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
| x3004 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 |
| x3005 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 |
| x3006 |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
Bob Computer just bought a fancy new graphics display
for his LC-3. In order to test out how fast it is, he rewrote the OUT trap
handler so it would not check the DSR before outputting. Sadly he discovered
that his display was not fast enough to keep up with the speed at which the LC-3
was writing to the DDR. How was he able to tell?
Bob also rewrote the handler for GETC, but when he typed
ABCD into the keyboard, the following values were input:
AAAAAAAAAAAAAAAAABBBBBBBBBBBBBBBBBBBBCCCCCCCCCCCCCCCCCCCDDDDDDDDDDDDDDDDDDDD
What did Bob do wrong?
The following program does not do anything useful. However, being an “electronic idiot,” the LC-3 will still execute it.
.ORIG x3000
LD R0, Addr1
LEA R1, Addr1
LDI R2, Addr1
LDR R3, R0, #-6
LDR R4, R1, #0
ADD R1, R1, #3
ST R2, #5
STR R1, R0, #3
STI R4, Addr4
HALT
Addr1 .FILL x300B
Addr2 .FILL x000A
Addr3 .BLKW 1
Addr4 .FILL x300D
Addr5 .FILL x300C
.END
Without using the simulator, answer the following questions:
What will the values of registers R0 through R4 be after the LC-3 finishes executing the ADD instruction?
What will the values of memory locations Addr1 through Addr5 be after the LC-3 finishes executing the HALT instruction?
The LC-3 has just finished executing a large program. A careful
examination of each clock cycle reveals that the number of executed
store instructions (ST, STR, and STI) is greater than the number of executed load instructions (LD, LDR, and LDI). However, the number of memory write accesses is less than the number of memory read accesses, excluding instruction fetches. How can that be? Be sure to specify which instructions may account for the discrepancy.