Sun, 11 Sep 2011, 20:49
A student writes:
> Dear Dr. Patt,
>
> I have two questions, one related to the homework, and one more general one.
>
> 1) I asked one of the TA's why the AND gate at the transistor level is
> composed of a NAND and then a NOT circuit, and he said that the number of
> other configurations is restricted because the n-type transistor cannot
> connect to the positive end of the battery and the p-type transistor cannot
> connect to the negative end without unpredictable voltage drops. Can you
> please elaborate on this, or do I have to wait for a later class?
>
> Thank you,
>
> <<name withheld to protect one who prefers to not wait for a later class>>
A few students have asked about this, so I plan to talk about this in class
tomorrow, even though it involves the electrial properties of the transistors,
which is beyond what we want you to understand deeply in EE306. Perhaps this
email will make the explanation in class be a little clearer. So, ...
Recall that if we connect the p-type to the power supply (aka positive end
of the battery) and the gate is 0, the transistor acts like a piece of wire.
That is, no voltage drop across the transistor. Similar for n-type and ground
with the gate at 1.
Unfortunately, the electrical properties of the n-type transisor are such that
if we connect it to the power supply and put 1 on the gate, the transistor
does not act like a piece of wire with no voltage drop. Rather there is a
voltage across the transistor known as the transmission voltage. Similar for
p-type connected to ground and the gate at 0.
Take the example of the AND gate you wish to design:
- 2.9 volts
|
a - N
|
b - N
|
---------output
| |
a-P b-P
| |
V V 0 volts
Please excuse the use of N and P rather than the correct symbols.
An ASCII keyboard does have its limitations!
Instead of the output being 2.9 volts if a=b=1, the output would be more
like 1.4 volts, if the transmission voltage was .7 volts across each
transistor. And, instead of the voltage being 0 volts if either a or b =0,
the output would be .7 volts.
Certainly one can tell the difference between 1.4 volts and .7 volts.
However, much better to tell the difference between 2.9 and 0 volts.
If the above is unclear, we will look at this again in class tomorrow.
BUT, again, it is not central to the core fundamentals of EE306.
> 2) For #6 in the problem set, can we use the standardized
> representation of the 2-to-1 mux or do you want us to draw out the gate
> level?
No, please use the standard representation of a 2-1 MUX. Do not waste the
time drawing out all the gates.
Hope the above helps. See you in class tomorrow.
Yale Patt