Wed, 13 Nov 2013, 23:40
My students, Yesterday, one of your classmates sent you email from Blackboard to point you to a website that has a number of short videos on the LC-3. I decided to simply ignore the email until after the exam since the last thing you needed yesterday was a disruption in your studying the day before the exam. > Fellow 306 students, > I found the following video series on the LC-3 data paths to be interesting, > and thought they might be helpful to some degree: > http://www.youtube.com/user/ECE290AMGroup?feature=watch > > In the words of Dr. Patt, "Good luck on the exam." > > <<name withheld here; you have it in your Blackboard eamil>> Now that the exam is history, and you are free to think about what comes next, I can talk about the videos. I went to the web site and played a few of the videos. The first one was brilliantly done, covering an overview of the instruction set, the data path, and the microsequencer. I highly recommend watching it! However, when I got into some of the other videos, I found errors that could end up confusing you. So, before I recommend the entire set, I need to be sure what is correct. And, that will take time. I also hope to get in touch with those who made the videos to see if they can edit them to correct the errors. For example, the video on memory says there are 2^16 memory locations, each containing 16 bits. They are confusing memory locations with memory address space. Indeed, an address has 16 bits. However, you recall from lecture that not all addresses correspond to memory locations. Some addresses are used for I/O device registers. That is why we call it "memory-mapped" I/O, and why we can use load instructions for input and store instructions for output. Actual memory locations correspond to addresses x0000 to xFDFF. For example, there is no memory location whose address is xFE00. That address is used for the KBSR. Also the memory video confuses MIO.EN with MEM.EN. We discussed that in detail at the review session on Monday. The video shows MIO.EN as an input to the RAMs that make up memory. What is really going on, as we discussed in class and in an email Monday night, is that MIO.EN is an input to the address control logic which outputs MEM.EN if MIO.EN = 1 and the MAR contains an address that corresponds to a memory location. If MAR contains an address of an I/O device register, then memory is not activated, but instead one of the I/O device registers is read or written. Bottom line: The videos look very good in general. However, they do have mistakes, so be careful if you wish to rely on them. If you decide to use them and find any discrepancy between them and what is in the book or what you have heard from me or one of my TAs, please tell one of the TAs so we can help you with the discrepancy. Enjoy the rest of the week. See you in class on Monday. Yale Patt