BBSY (bus busy)
BG (Bus Grant)
BR (Bus Request)
DAE
DMA access
Daisy Chained
IO Controller vs IO processor
IO control block
LRU (least recently used replacement) algorithm
MSYN (master sync)
Multiplexed Address and Data bus
PAU (Priority Arbitration Unit)
SACK(System Acknowledge)
SIMD
SSYN (slave sync)
ULP
VLIW
acitve window
arbitration (central v. distributed)
binade
booth's algorithm
burst traffic
cold start
commit/retire
cycle stealing
direct mapped cache
dirty bit
exception
floating point -> sign bit - exponent - fraction, range, precision, radix
floating point exceptions - inexact, divideby0, underflow, overflow, invalid (NAN)
fully associative cache
handshaking
instruction cache and data cache
interrupt
machine check
memory-mapped IO vs special IO instructions
non-single assignment
polling vs interrupt driven IO
priority
race condition
reorder buffer (result buffer)
rounding modes(chopping, round up, round down, round to nearest)
spatial locality
strip mining
systollic array
temporal locality
trace scheduling
vector length register
vector stride register
victim bit, next victim bit
wobble
write back cache
write through cache