Mon, 30th Nov 2015, 01:17 Re: Programming Lab 5



A student writes:


> Dr. Patt,
>
> I have a more generalized question that pertains to Programming Lab 5. I'm
> a bit confused on how interrupt service routines are actually implemented
> in code. I understand the difference between polling and interrupt-driven
> I/O whereby in polling, the user program is constantly "polling" the I/O
> devices to retrieve information, and in interrupt-driven I/O, the user
> program can worry about itself and only give attention to I/O devices when
> an interrupt comes in. (Please correct me in my understanding if I am
> mistaken somewhere.)
>
> However, regarding the interrupt in Programming Lab 5, wouldn't the user
> program need to constantly check the interrupt signal in order to know when
> to deal with an interrupt? I'm unsure of how the user program could deal
> with an interrupt if it isn't "polling" the interrupt signal.
>
> Thank you in advance for your help.
>
> <<name withheld to protect the student who knows something must be checking>>


Yes, something must be checking the interrupt signal, but NOT the user program.
In fact, the user program is oblivious to interrupts.  Recall, they are caused
by things that are external to the program that is running.  Like someone pulled
the power cord from the wall, for example!  Do you really want your program to
constantly check for that stupid event?

Then who is checking?  Answer: the hardware!

Recall the state machine that is controlling the processing of instructions.
You all know that state 32 provides for a 16-way microbranch, depending on
the opcode bits.  What about state 18?  Note [INT] -- that is, in
the first cycle of processing, when MAR is loaded with PC and PC is updated
to PC+1, the hardware tests for the interrupt signal.  If an interrupt is
present, the hardware does not go to state 33 to get the instruction from
memory, but rather goes to state 49 to start the process of initiating the
interrupt.  If no interrupt is present, the hardware continues to state 33
to carry out the normal instruction cycle of Fetch, Decode, etc.

Welcome back from the Thanksgiving weekend.  Good luck with lab 5 and
the final exam.



Yale Patt