list of buzzwords for Exam 1
<br>
<br>
<br>
addressability
<br>
endianness
<br>
state of machine
<br>
instruction level simulator
<br>
cycle level simulator
<br>
cache memory
<br>
data supply
<br>
instruction supply
<br>
datapath
<br>
performance
<br>
cost
<br>
time to market
<br>
critical path design
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bread and butter
<br>
balanced design 
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speculative execution
<br>
overflow
<br>
predicated execution
<br>
overflow
<br>
priority encoder
<br>
SIB Byte
<br>
semantic gap
<br>
CPI
<br>
ASIC
<br>
pari and spare
<br>
pipeline
<br>
construction microcode
<br>
selective microcode
<br>
instruction cache
<br>
data cache
<br>
out of order execution
<br>
scoreboard
<br>
architectural/physical registers
<br>
reservation stations
<br>
reorder-buffer(ROB)
<br>
dataflow graph
<br>
node tabtle
<br>
dataflow node
<br>
branch prediction
<br>
branch misprediction penalty
<br>
2 bit saturating counter
<br>
dynamic branch prediction
<br>
static branch prediction
<br>
last time predictor
<br>
always taken/always not taken
<br>
wilkes diode matrices
<br>
hammock
<br>
merge point
<br>
flow dependency
<br>
microinstruction
<br>
microsequencer
<br>
control store
<br>
register renaming
<br>
register alias table(RAT)
<br>
precise exception
<br>
micro-ops
<br>
retirement
<br>
Edit-PC
<br>
INDEX
<br>
FF
<br>
REMQUE
<br>
INSQUE
<br>
IT
<br>
EMT
<br>
AOBLEQ
<br>