Sun, 12 Nov 2023, 19:53 Re: Detail about the LC-3 Data Path

  A student writes:

  
  > Good evening Dr. Patt,
  > 
  > Hope this email finds you well, I have a question regarding the LC-3 
  > Data Path gates (GateMARMUX, GatePC, etc.). At each gate, right before 
  > it enters the processor bus, each gate has an inverter and I wanted to 
  > know why that is? And what would happen if that gate wasn't there?
  > 
  > Thank you,
  > <<name withheld to protect the student who thinks it is an inverter>>
  
  
  It is actually not an inverter, it is the symbol used to describe an electronic structure called a  tri-state 
  device.  You do not need to worry about tri-state devices in ECE306, other than the notion that it 
  connects (or does not connect) something to the bus.  You will study how the circuitry works in an 
  electronics course if you choose to take it.  For now, you only need to know that a tri-state device either 
  connects or does not connect its input (PC in the case of GATEPC) to its output (in this case, the bus).  For 
  example, GatePC is a control signal that is either 0 or 1.  If 1, the PC is connected to the bus.  If 0, the PC 
  is not connected to the bus.  If you want to use the bus to tranfer information, as in MAR <-- PC in state 
  18, for example, you would want to connect the PC to the bus and you would want to load MAR from the 
  bus.
  To connect PC to the bus, you would want the GATEPC signal to be 1 and all other GATE signals to be 0.  
  To load the MAR, you would want the LD.MAR signal to be 1.
  
  Good luck on the midterm tomorrow.
  
  YNP