Sat, 8 Feb, 2025

    
        My students,

        The question posed in ED about the control signal for the SR2MUX missing from
        the list of microarchitecture control signals reveals some additional insight.  Ergo, this email.

        The reason is that the choice for the second operand in the operate
        instructions (ADD, AND, etc.) is part of the ISA, and handled by the ISA.
        Specifically, it is handled by bit[5], the steering bit in the operate
        instructions.

        Looking at the data path figure, I see that this would have been a lot clearer
        if I had drawn a wire from the IR direct to the select line of the SR2MUX,
        labeling it IR[5], and completely avoiding the block labeled CONTROL
        altogether.  The outputs of the CONTROL block are the control signals of the
        microarchitecture, and IR[5] is not one of them.

        Thanks for the question.  I appreciate the opportunity to make things clearer.

        See you Monday.
        YNP