EE345L Microprocessor Applications and Organization  Spring 2003
Class: JES A121A, Monday, Wednesday 1-2pm         Lab recitation: ENS302 Friday 1-2
Office Hours: Monday 11-12, Wednesday 2-3, Friday 10-11
Instructor: Jonathan W. Valvano, ENS617A, 471-5141 
email: valvano@mail.utexas.edu, schedule
Web page: http://www.ece.utexas.edu/~valvano
Text: Embedded Microcomputer Systems, Brooks-Cole 2000, by J. W. Valvano
Lab: ENS252C  Unique Numbers:  14629 W9-12, 14630 F9-12, 14635 T9:30-12:30, 14640 Th9:30-12:30, 14645 T3:30-6:30, 14650 T12:30-3:30, 14655 Th12:30-3:30, 14660 W3-6, 14661 M3-6, 14663 M7-10, 14665 Th7-10
EE345L and EE345M TAs:
        Anil Kottam, kottam@ece.utexas.edu, (HEAD TA)
        Chia-ling Wei, clwei@mail.utexas.edu, 
        Jignesh Shah, jignesh_s@softhome.net, 
        Icaro Santos, icaro@ieee.org, 
        David Altman, gautam@mail.utexas.edu, 
        Nachiket Kharalkar, knachike@ece.utexas.edu,
        Robin Tsang         
Reference materials: Data sheets for most of the devices used in this class are available as pdf files on the lab network and on the CD. Please make sure you have access to the MC68HC812A4 Technical Summary, and the MC68HC812A4 Electrical Specifications
IEEE Parts: 
   1 prototype board per student (2 per group)
   Lab supplies: resistors, 3.5 inch floppy disks, wires
HKN:    Spring 2003 EE345L Laboratory Manual by J. W. Valvano
Other references: For programming in C and digital logic, see the EE312 and EE316 texts
Also see Kelly/Pohl, A Book on C, Benjamin Cumming Publishing
Prerequisites: EE319K, EE322C and EE438 or EE338 and credit or coregistration for EE333T.  
Specific Objectives of EE345L
Microcomputer Architecture (EE319K review)
    An Introduction to the Microcomputer, Computer Architecture, The 6812 Instruction Set, 6812 Addressing Modes, 6812 Instructions, Organization of the M68HC12, Notation for Block Diagrams, MC68HC812A4 I/O and Memory Organization, The Memory Map of the MC68HC812A4
Programming Microprocessors (EE312, EE322 review)
    Data Structures in C, Indexable Data Structures, Sequential Data Structures, Writing Clear Programs in C, Documentation, Programming Style, Subroutines and Arguments in C, Passing Parameters (Conceptual Level), Passing Parameters (Implementation Level), Calling and Returning Mechanisms, A Blueprint for Writing Subroutines, Subroutine Documentation
Microcomputer Bus Interfaces
    Digital Hardware, Modules and Signals, Drivers, Registers, Timing equations, timing diagrams, Address decoding, PROM, RAM interface
Parallel and Serial Input-Output
    Simple I/O Devices, Basic Input and Output Devices, Input-Output Software, I/O Transfers and Buffered Input and Output, Programmed Logic Control, Table and Linked List Interpreters, Programmable Parallel Input-Output Devices, Problems with LSI I/O and the Ritual, M6812 Single-Chip Parallel Input-Output Registers, Indirect Input-Output, Synchronous Serial Input-Output, Serial I/O Chips, Control of Serial I/O Chips Using a Parallel Port, The MC68HC812A4 Serial Peripheral Interface
Interrupts and Alternatives
    Synchronization in I/O devices, Synchronization Principles of I/O Devices, Synchronization Mechanisms for the M6812 Parallel Ports, Slow Synchronization Mechanisms, Real-Time Synchronization, Gadfly Synchronization, Single Interrupts, Polled Interrupts, Vectored Interrupts, Vectored Interrupts in the M6812
Parallel Port Interfaces
    Keyboards, Key Debouncing, Keyboard Scanning Techniques, LED's and LCD's
Communication Systems
    Communications Principles, Signal Transmission, UART Link Protocol, UART Transmission and Reception by Software, Serial Communications Interface System in the 6812
Special Topics
    About 1-2 weeks each semester will be allocated to cover special state-of-the-art topics involving embedded microcomputers and their applications.
Attendance: Students are expected to attend lectures. The book covers more information than the class and we will use lectures to map our way through the book. If you miss class you may find it difficult to catch up.
Grading:    40% Laboratory
        15% In class Quiz1, closed book, Wednesday, March 5, 1:00 to 1:50 pm, in regular class room
        15% In class Quiz2, closed book, Wednesday, April 9, 1:00 to 1:50 pm, in regular class room
        30% Final, closed/open book, Thursday, May 8, 2-5pm, regularly scheduled
Your grade will be assigned on the usual 60, 70, 80, 90 basis. An average above 70 is required to receive a credit (CR/NR).
Lab Partners: All labs should be performed with a partner. The lab partnership must be registered with your TA (a simple hand written note signed by both students will suffice) at least a week before the assignment is due. Once registered, the partnership will continue. A partnership can be dissolved only after discussion with the TA. Both partners must be present during the demonstration. It is expected that both partners will contribute to all aspects of each lab, and both partners are expected to be present during the check out. The point values are the same for all labs. The TA will sign your software listing when you demonstrate your system. All parts of the assignment must be demonstrated to a TA by the end of your lab period the week shown in the column labeled "Demo/Report". Any EE345L/EE345M TA is authorized to checkout your lab.  The report (hardware/software/data plots) are due one day after the demonstration is due. Please consult with your TA for specific due dates for your lab section.
Laboratories 
    1b. SCI serial port drivers, decimal fixed point input/output
    2d. Functional debugging, linked list FIFO 
    3c. Performance debugging 
    4d. PCB layout of RAM interface 
    5c. Stepper Motor Robot (simulation) or 4c Stepper Motor Interface
    6d. LCD Watch
    7c. Interrupting Keyboard Interface and Calculator (2 weeks)
    8c. Synchronous serial I/O, Graphics interface using a DAC
    9a. RAM testing 
    10a. Position Measurement
EE345L Laboratory Schedule (see your TA for the latest)

    No lab activities occur during the week of January 13-17. During the week of January 21-24, please go to the first hour of any of the scheduled EE345L lab sessions in ENS252C to get a demonstration of the lab equipment.  Technological Arts Adapt812 boards will be passed out and lab partners will be selected in your lab the week of January 27-31. The Lab 1 preparation is due at the beginning of your lab the week of January 27-31.  The lab preparations (hardware diagrams and syntax-free software source code printouts) are due at the beginning of your lab period. In other words, please type your software into the PC before lab. Attendance in lab is required. All software for lab, and tests must include comments. All hardware must include R&C values specifying tolerance and type (e.g., 5% carbon), and TTL chip numbers (be very specific e.g., 74LS00). Pin numbers are required only for lab, not for the exams.
    Students are encouraged to go to the last 2 hours of the other lab periods (including when EE345M labs are scheduled), but the first priority will be to the regular students. During the first 15 minutes of lab, the TA will collect preparations and take attendance. For the next 30 minutes, the TA will lead a lab discussion session. The remaining lab time is available for debugging and lab checkout. At the end of the semester please verify with the checkout counter that your record is clear. All reports must be given to the TA by Friday May 2, 12 noon.

Legal Stuff: The 12th class day is January 29. After this date, I will sign a drop only if the Dean approves it. Your current grade status must be a "C" or better for you to receive a "Q". Course evaluation is conducted on the last class day in accordance with the Measurement and Evaluation Center form. The final exam is at the time and place stated in the course schedule. The University of Texas at Austin provides upon request appropriate academic adjustments for qualified students with disabilities. For more information, contact the Office of the Dean of Students with Disabilities at 471-6259, 471-4241 TDD.
Cheating: Cheating is very uncivilized behavior and is to be avoided at all cost. You are allowed to talk to your classmates about the lab assignments, but you are NOT allowed to look at each other's written work. Oral discussion about an assignment is encouraged and is not considered to be cheating. Copying of any part of a program is cheating without explicit reference to its source. If we find two programs that are copied, there will be a substantial penalty to both students, e.g., failure in the course. Students who cheat on tests or in lab will fail. Prosecution of cases is very traumatic to both the student and instructor. PLEASE DO YOUR OWN WORK. Policies concerning the use of other people's software in this class:
     • I strongly encourage you to study existing software.
     • All applications and libraries must be legally obtained. E.g.,
          You may use libraries that came when you bought a compiler.
          You may use software obtained from a BBS or on the WWW.
          You may copy and paste from the existing source code. 
     • You may use any existing source code that is clearly referenced and categorized:
          original: completely written by you,
          derived: fundamental approach is copied but it is your implementation,
          modified: source code significantly edited to serve your purpose,
          copied: source code includes minor modifications.
Places to buy prototyping boards and other parts
In Austin

When studying, focus on the topics that apply to the 6812 and the topics included in the lab assignments. You will find old quizzes and finals with solutions on the class web site.

STUDY GUIDE for Quiz 1
Lab      Important Topics
1b        SCI port, RS232 drivers, software device driver, data flow graphs
2d,3c    Hardware/software debugging techniques, instrumentation, profiling, linked list, real time interrupt
5c/4c     Parallel port interface, segmentation, abstraction, stepper interface,  Finite state machine, statically allocated linked structures
Chapter   Topic
1-2          6812 architecture and assembly language, interpreting output of the C compiler (parameters, locals globals, critical sections),                    C programming (const, static, volatile, long, #define, #pragma abs_address:0xfffe), statically allocated linked lists, interpreters
3              parallel ports, direction registers, open collector, input/output currents
4              RTI interrupts
8              high current interface (stepper)
Guarantees    
        C programming syntax
        RTI interrupt software
        debugging concept/implementation, FSM data structure 
STUDY GUIDE  for Quiz 2 (Quiz 1 stuff plus the following)
Lab      Important Topics
6c       Switch inputs, LCD outputs, polling, accurate time delays
7c       Keyboard scanning, interrupts, open collector, 
              software device drivers, fifo queues, 
              critical sections, real time profile
              multithreaded distributed software system,
Chapter   Topic
3,4          Choosing between real time, gadfly,  interrupts, periodic polling, DMA
4             Interrupts, latency, key wakeup, fifos, periodic polling,  vectored vs. polled interrupts, 
6.2.3      Output compare periodic interrupt
8            Keyboards, debouncing, scanning,  LEDs, relays, stepper motors, LCD interfaces, abstraction, interrupt software: key wakeup, TOF, RTI, or SCI
STUDY GUIDE for Final (Quiz 1, Quiz 2 stuff plus the following)
Lab      Important Topics
8c    SPI, DAC, software device drivers
9a        memory interfacing,
10a       ADC, data acquisition
Chapter  Topic
7          serial devices,  SPI interfacing, SCI, interrupts, RS232, RS422, full duplex, half duplex, simplex, bandwidth, synchronization with printers
9          memory interfacing, timing diagrams
11        built-in A/D converter
14        Networks, message protocols, layered approach, concept of parallel port network using tristate logic,                   concept of parallel port network using open collector logic, handshake,IEEE488 bus
Guarantees   
        interrupt software: key wakeup, TOF, RTI, SCI or SPI, 
        memory interface, 
        network interface/synchronization

Curious about my research? See
http://www.ece.utexas.edu/~valvano/research