EE345M Microcomputer Interfacing Lab
Class: ENS302 Monday, Wednesday 12 to 12:50pm
Office Hours: Mon. 10-11:45am, Wed. 11-11:45am, Fri. 10 am to 2 pm
Instructor: Jonathan W. Valvano, ENS617A, 471-5141, Lab ENS619/621 (1-1216)
email valvano@uts.cc.utexas.edu
fax 471-0616
Web page http://www.ece.utexas.edu/~valvano
Unique Numbers: 15255 15260 15262
TAs: Anand Rajan <arajan@ece.utexas.edu>
Handout: Motorola CPU12 Reference Manual,
The 6812 Technical Summary is available as a pdf file on the lab
network and on the CD
Text: Embedded Microcomputer Systems, Brooks-Cole 2000, by J.W. Valvano
IEEE Parts: any TTL Data Book includes either LSTTL or HC parts
1 prototype board per student (2 per group)
Lab supplies: resistors, 3.5 inch floppy disks, lock for 2nd floor locker
HKN: Fall 2001 EE345M Laboratory Manual by J.W. Valvano
Lecture notes and lab manual
Lectures and lab manual
Other references: For programming in C and op amps, see the EE360C and EE338K
texts
Also see Kelly/Pohl, A Book on C, Benjamin Cumming Publishing
Prerequisites: EE345L, EE338K, and EE155. There will be no re-tests, make-ups,
or incompletes.
Specific Objectives of EE345M
Review of 6812 architecture, and C programming
Synchronization methods
Gadfly, interrupt, DMA, periodic polling, priority interrupts
Real time operating systems
Foreground and background thread scheduling
Synchronization using spinlock and blocking semaphores
Interthread communication, networks
Digital Device Interfaces
Diodes, transistors, DC motors, servos, stepper motors, relays,
solenoids,
Optical sensors and optical isolation
Time Domain Interfaces
Input capture/output compare, frequency, period and pulse width
measurements,
Pulse-width modulation
Data Acquisition Systems
Op amp amplifiers, DAC, ADC
Thread scheduling, digital filters
Control systems
Open loop and closed loop, Linear and Nonlinear,
Bang-bang, incremental, PID, Fuzzy Logic Control
Review of Microcomputer Bus Interfaces
Timing equations, timing diagrams,
Address translation and extended mode
Attendance: Students are expected to attend lectures. The book covers more
information than the class and we will use lectures to map our
way through the book. If you miss class you may find it difficult
to catch up.
Grading: 40% Laboratory
15% In class Quiz1, Wednesday, October 10, in regular class room
15% In class Quiz2, Monday, November 19, in regular class room
30% Final, Monday, December 17, 2-5pm, regularly scheduled
Your grade will be assigned on the usual 60, 70, 80, 90 basis.
An average above 70 is required to receive a credit (CR/NR).
Lab Partners: All labs should be performed with a partner. The lab partnership
must be registered with the TA (a simple hand written note signed
by both students will suffice) at least a week before the assignment
is due. Once registered, the partnership will continue. A partnership
can be dissolved only after discussion with the TA. Both partners
must be present during the demonstration. It is expected that
both partners will contribute to all aspects of each lab, and
both partners are expected to be present during the check out.
The point values are the same for all labs. The TA will sign your
software listing when you demonstrate your system. All parts of
the assignment must be demonstrated to a TA by the end of your
lab period the week shown in the column labeled "Demo/Report".
The report (hardware/software/data plots) are due one day after
the demonstration is due. Please consult with your TA for specific
due dates for your lab section.
EE345M Laboratories
13. Real time debugging
14. Optical isolation, pulse width modulated squarewave generation,
motor interface
15. Period measurement of a DC motor tachometer
16. IR Remote Control (TExaS simulator)
17. Real-time operating system
25. Solid state secondary storage
21. Digital to analog conversion, sine wave generation
22. Temperature data acquisition, analog amp, and digital filter
23 or 24. Embedded System (2 weeks)
23. PID or fuzzy logic motor control, pulse width modulation,
period measurement
24. Line tracking robot
Preliminary EE345M Laboratory Schedule (see your TA for the latest)
Week of
Quiz
Preparation
Demo/Report
Comments
8/27
none
none
none
9/3
13
13
none
Demonstration, Partners, boards
9/10
14
14
13
9/17
15
15
14
9/24
16
16
15
10/1
17
17
16
10/8
none
none
none
Lab attendance required
10/15
25
25
17
10/22
21
21
25
10/29
22
22
21
11/5
none
none
none
11/12
23/24
23/24
22
11/19
none
none
none
No labs this week
11/26
none
none
none
Lab attendance required
12/3
none
none
23/24
Turn in equipment by 12/7
You have the option of proposing an alternative last lab involving
any topic introduced in EE345L or EE345M, forming groups of ranging
from 2 to 4 students. These groups may include students from other
lab sections. Please get your TA approval by 11/1, if you choose
to define your own last lab. Otherwise, we expect you to do Lab
23 or 24 as a group of 2 as specified in the lab manual.
During the week of August 27, please go to your regularly scheduled
EE345M lab in ENS252C to hear a TA explain the lab grading policy. If you miss your section, go to one of the other sessions. ImageCraft
Adapt812 boards will be passed out and lab partners will be selected
in your lab the week of Sept 4-8. The Lab 13 preparation is due
at the beginning of your lab the week of Sept 4-8. Preparation
includes hardware wiring diagrams and syntax-free assembly printouts.
In other words, please type your software into the PC before lab.
The lab preparations (hardware diagrams and syntax-free software
source code printouts) are due at the beginning of your lab period.
Attendance in lab is required. All software for lab, and tests
must include comments. All hardware must include R&C values specifying
tolerance and type (e.g., 5% carbon), and TTL chip numbers (be
very specific e.g., 74LS00). Pin numbers are required only for
lab.
Students are encouraged to go to the last 2 hours of the other
lab periods (including when EE345L labs are scheduled), but the
first priority will be to the regular students. Because of the
lab quiz, the first hour of lab is restricted to the regular students.
CLEAR OUT BY 15 minutes before the start of lab. At the end of the semester please verify with the checkout counter
that your record is clear. All reports must be given to the TA
by Friday December 7, 12 noon.
Date
Chapter
Topic
8/29
1, 2
EE345L review, 6812 introduction, device drivers
9/5
2, 4, 7
Lab environment, 6812 debugging techniques, SCI interrupts on
the 6812
9/10
8, 6
Transistor interfaces, optical isolation, PWM
9/12
6
Periodic output compare interrupts, PWM
9/17
6
Input capture, simple period and pulse width measurement
9/19
5
Threads, TCB, switching
9/24
5
Spinlock semaphores
9/26
5
Blocking semaphores and thread communication
10/1
9
Address, decoding timing diagrams
10/3
9
6812 data bus timing, address translation
10/8
9
6812 RAM interface, extended memory
10/10
1,2,4,6,7
Quiz 1 in class, open book, covering material in Labs 13,14,15,16
10/15
11
Analog Circuits, amplifiers filters
10/17
11
DAC, Signal generation
10/22
11, 12
ADC, data acquisition systems
10/24
12
Data acquisition systems
10/29
15
Digital filters
10/31
5, 15
Real time signal processing
11/5
13
Control systems
11/7
13
PID control systems
11/12
13
Fuzzy Logic Control Systems
11/14
Industrial guest speaker
11/19
5,11,12
Quiz 2 in class, open book, covering material in Labs 17,25,21,22
11/21
no class
11/26
9
extended memory, address translation, solid state disk
11/28
10
DMA on the MC68HC708XL36
12/3
14
Modems
12/5
all
Review, course evaluation
12/7
All Lab notebooks are due to the TA at 12 noon
12/7
Turn in Lab Equipment so that Mona wont bar your registration
12/17
Final exam, Monday, 2-5pm, Room regularly scheduled
Sections from the book required to perform the labs
1.6. Digital Logic And Open Collector
2.11. Debugging Strategies
4.5.4. MC68HC812A4 Interrupt Vectors And Priority (Review)
7.6.2. SCI Receive Only Interrupt Interface
Lab Example SCI12.H SCI12A.C (Review)
8.4. Transistors Used For Computer Controlled Current Switches
8.5.5. Pulse Width Modulated DC Motors
8.5.6. Interfacing EM Relays, Solenoids, And DC Motors
Figure 8.70 (IRF540, 6N139)
6.2.1. General Concepts
6.2.2. Output Compare Details
6.2.3. Periodic Interrupt Using Output Compare (Review)
6.2.5. Pulse Width Modulation
6.1.1 Basic Principles Of Input Capture
6.1.2. Input Capture Details
6.1.3. Real Time Interrupt Using An Input Capture
6.1.4. Period Measurement (Not 32-Bit)
6.1.5. Pulse Width Measurement
6.4.1. Using Period Measurement To Calculate Frequency
5. Threads (6812, but not 6811)
9.5.3. Motorola MC68HC812A4 External Bus Timing (Review)
9.7.2.2 8K RAM/6 Interface (Review)
9.7.5. Extended Address Data Page Interface To The MC68HC812A4
Covered on the exams, but not necessary for the labs
6.3. Frequency Measurement
6.3.1. Frequency Measurement Concepts
6.3.2. Frequency Measurement With ?F=100Hz
6.5. Measurements Using Both Input Capture And Output Compare
6.5.1. Period Measurement With ?P=1ms
6.5.2. Frequency Measurement With ?F=0.1Hz
10. High Speed I/O Interfacing
10.1. The Need For Speed
10.2. High Speed I/O Applications
10.3. General Approaches To High Speed Interfaces
10.4. Fundamental Approach To DMA
11.2.7.5 Subtracter Circuits
11.2.7.6 Instrumentation
11.3.2. Butterworth Filters
Legal Stuff: Drop date is Sept. 4. After this date, I will sign a drop only
if the Dean approves it. Your current grade status must be a "C"
or better for you to receive a "Q". Course evaluation is conducted
on the last class day in accordance with the Measurement and Evaluation
Center form. The final exam is at the time and place stated in
the course schedule. The University of Texas at Austin provides
upon request appropriate academic adjustments for qualified students
with disabilities. For more information, contact the Office of
the Dean of Students with Disabilities at 471-6259, 471-4241 TDD.
Cheating: Cheating is very uncivilized behavior and is to be avoided at
all cost. You are allowed to talk to your classmates about the
lab assignments, but you are NOT allowed to look at each others written work. Oral discussion about an assignment is encouraged and is not considered to be cheating. Copying of any part of a program is
cheating without explicit reference to its source. If we find
two programs that are copied, there will be a substantial penalty
to both students, e.g., failure in the course. Students who cheat
on tests or in lab will fail. Prosecution of cases is very traumatic
to both the student and instructor. PLEASE DO YOUR OWN WORK. Policies concerning the use of other peoples software in this
class:
I strongly encourage you to study existing software.
All applications and libraries must be legally obtained. E.g.,
You may use libraries that came when you bought a compiler.
You may use software obtained from a BBS or on the WWW.
You may copy and paste from the existing source code.
You may use any existing source code that is clearly referenced
and categorized:
original: completely written by you,
derived: fundamental approach is copied but it is your implementation,
modified: source code significantly edited to serve your purpose,
copied: source code includes minor modifications.
Places to buy prototyping boards and other parts
In Austin
AlTex Electronics 832-9131
Tinkertronics 926-4420
Radio Shack
Mail Order
BG Micro, Dallas 1-800-276-2206 http://www.bgmicro.com
All Electronics, Los Angeles 1-800-826-5432 http://www.allcorp.com
Jameco, Belmont CA 1-800-831-4242 http://www.jameco.com
TechAmerica, Fort Worth, 1-800-877-0072
Hosfelt, Steubenville, OH, 1-888-264-6464, 1-800-524-6464
STUDY GUIDE Quiz 1
Lab Important Topics
13. SCI interrupts, RS232 drivers, software device driver, real
time debugging
14. Optical isolation, pulse width modulation, transistor interfaces,
back EMF, MOSFETs
15. Period measurement, sine wave to square wave
16. IR detector interface, input capture measurements of pulse
width, output compare interrupts
Chapter Topic
1.5, 2, 4 6812 architecture and assembly language,
interpreting output of the C compiler (parameters, locals
globals)
4 fifos, statically allocated linked lists, dynamically allocated
linked lists,
interrupts, latency, real time interrupts, periodic polling,
critical sections
3, 4 Choosing between real time, gadfly, interrupts, periodic
polling, DMA
6 Input capture, period measurement, pulse width measurement
6 Output compare, pulse-width modulation, frequency measurement
8.4, 8.5 6N139 isolation, solenoids, DC motors, back EMF
Guarantees
Interrupts: data structures, latency, debugging
Input capture or output compare: period or pulse width
measurement
STUDY GUIDE Quiz 2 (Quiz 1 stuff plus the following)
Lab Important Topics
17. Real time OS, semaphores, critical sections, synchronization,
communication
25. Memory interfacing, address translation
21. DAC interface, DAC signal generation
22. 6812 ADC, analog amplifiers, analog filters, digital filters,
fixed point numbers, resistor bridge, op amps
Chapter Topic
9 Address decoding, timing syntax, synchronous, partially asynchronous,
fully asynchronous, general approach to interfacing,
interface of RAM and ROM to a 6812 in expanded narrow
mode,
interface of a RAM and ROM to a 6812 in expanded wide
mode,
data bus drivers (no 16-bit, 6811, DRAM, parity check),
Address translation, paged memory
11, 12 Analog Circuits, amplifiers filters, ADC, DAC, data acquisition
systems
11.9, 15 Digital filters implementations, multiple access circular
queue
Guarantees
Interrupt software
Memory interface: timing analysis, diagrams, design, CS
initialization
Data acquisition systems
Analog circuits
STUDY GUIDE Final (Quiz 1 and Quiz 2 stuff plus the following)
Lab Important Topics
23/24 Control system, either PID or Fuzzy, periodic interrupts,
AC to TTL conversion, input capture measurement of period, discrete
derivative
Chapter Topic
10 DMA concepts, single vs. dual cycle, block (burst) vs. cycle
steal, software synchronization, bandwidth, latency, address increment,
block size, autoinitialization (reloads parameters and loops continuously)
13 Control Systems, open loop, closed loop, PID implementations,
Fuzzy Logic design and implementation
Guarantees
Control system implementation
Multiple source interrupts with synchronization
Memory interface: timing analysis, diagrams, design, CS
initialization
Analog circuits
Input capture or output compare: measurement or signal
generation
Curious about my research? See
http://www.ece.utexas.edu/~valvano/research