EE345M Microcomputer Interfacing Lab Summer 1999
Class: ENS302 MW 2:30 to 4:00pm
Office Hours: Office Hours MWF 12-1
Instructor: Jonathan W. Valvano, ENS617A, 471-5141, Lab ENS619/621 (1-1216)
email valvano@uts.cc.utexas.edu
Web page http://www.ece.utexas.edu/~valvano
Unique Number: 77005(TTh11:30-2:30 lab) or 77010(MW4-7 lab)
TA: Ann Meyer, MeyerAnnA@mail.utexas.edu
Handout: Motorola MC68HC812A4 Technical Manual and MC68HC12 Programming
Manual
IEEE Parts: any TTL Data Book includes either LSTTL or HC parts
1 prototype board per student (2 per group) See mail order companies on page 4.
Lab supplies: resistors, 3.5 inch floppy disks, lock for
2nd floor locker
HKN: Summer 1999 EE345L/M Lecture Notes by J.W. Valvano
Spring 1999 EE345L/M course notes by Valvano are OK.
Summer 1999 EE345M Laboratory Manual by J.W. Valvano
Other references: For programming in C and op amps, see the EE360C and EE338K
texts
Also see Kelly/Pohl, A Book on C, Benjamin Cumming Publishing
Prerequisites: EE345L, EE338K, and EE155. There will be no re-tests, make-ups,
or incompletes.
EE345M Topics
Review of 6812 architecture, and C programming
Synchronization methods
Gadfly, Interrupt, DMA, Periodic polling, Real time systems, priority
interrupts, round robin, thread scheduling, Thread synchronization
using spinlock and blocking semaphores
Digital Device Interfaces
DC motors, Servos, Stepper Motors, Relays, Solenoids, IEEE-488,
SCSI
Time Domain Interfaces
Input Capture/Output Compare, frequency, period and pulse width
measurements, Pulse-width modulation
Analog Interfaces
Op amp amplifiers, Op amp analog filters, D/A, and A/D, Data acquisition
systems, digital filters
Control systems
Open loop and closed loop, Linear and Nonlinear, Bang-bang, incremental,
PID, Fuzzy Logic Control
Microcomputer Bus Interfaces
Timing, address decoding, PROM, RAM interface, Dynamic RAM’s,
Bus drivers
Attendance: Students are expected to attend lectures. The book covers more
information than the class and we will use lectures to map our
way through the book. If you miss class you may find it difficult
to catch up.
Grading: 40% Laboratory
25% In class Quiz, Monday, July 19, 2:30 to 4:00 pm in
class
35% Final, Monday, August 16, 7 - 10 pm, regularly scheduled
Your grade will be assigned on the usual 60, 70, 80, 90 basis.
An average above 70 is required to receive a credit (CR/NR).
Lab Partners: All labs should be performed with a partner. The lab partnership
must be registered with the TA (a simple hand written note signed
by both students will suffice) at least a week before the assignment
is due. Once registered, the partnership will continue. A partnership
can be dissolved only after discussion with the TA. Both partners
must be present during the demonstration. It is expected that
both partners will contribute to all aspects of each lab, and
both partners are expected to be present during the check out.
The point values are the same for all labs. The TA will sign your
software listing when you demonstrate your system. All parts
of the assignment must be demonstrated to a TA by the end of your
lab period the week shown in the column labeled "Demo/Report".
The report (hardware/software/data plots) are due one day after
the demonstration is due. Please consult with your TA for specific
due dates for your lab section.
EE345M Laboratories
1. Interrupting SCI serial port drivers
2. Optical isolation, pulse width modulated squarewave generation,
motor interface
3. Infrared remote control sensor, pulse width measurement (2
weeks)
4. Graphics display using a dual D/A
5. Temperature data acquisition, analog amp, analog filter, and
digital filter (2 weeks)
6. PID or Fuzzy logic motor control, pulse width modulation, period
measurement (2 weeks)
7. Memory interfacing
8. Pre-emptive multithreaded scheduler with thread synchronization
(2 weeks)
Preliminary EE345M Laboratory Schedule (see your TA for the latest)
| Week of | Quiz | Preparation | Demo/Report | Comments |
| 6/3 | none | none | none | Demonstration, Partners chosen |
| 6/7 | 1 | 1 | none | get boards, bring lock |
| 6/14 | 2 | 2 | 1 | |
| 6/21 | 3 | 3 | 2 | |
| 6/28 | 4 | 4 | 3 | |
| 7/5 | 5 | 5 | 4 | |
| 7/12 | 6 | 6 | 5 | |
| 7/19 | none | none | none | Lab attendance required |
| 7/26 | 7 | 7 | 6 | |
| 8/2 | none | 8 | 7 | No quiz for lab 8 |
| 8/9 | none | none | 8 | Turn in equipment by 8/13 |
You have the option of proposing an alternative Lab 8 involving
any topic introduced in EE345L or EE345M, forming groups of ranging
from 2 to 4 students. These groups may include students from other
lab sections. Please get your TA approval by 7/19, if you choose
to define your own lab 8. Otherwise, we expect you to do Lab 8
as a group of 2 as specified in the lab manual.
During the week of Jan 25-29, please go to your regularly scheduled
lab in ENS252C to hear a TA explain the lab grading policy. If you miss your section, go to one of the other sessions. ImageCraft
Adapt812 boards will be passed out and lab partners will be selected
in your lab the week of Jan. 25-29. The Lab 1 preparation is due
at the beginning of your lab the week of Feb. 1-5. Preparation
includes hardware wiring diagrams and syntax-free assembly printouts.
In other words, please type your software into the PC before lab.
The lab preparations (hardware diagrams and syntax-free software
source code printouts) are due at the beginning of your lab period.
Attendance in lab is required. All software for lab, and tests
must include comments. All hardware must include R&C values specifying
tolerance and type (e.g., 5% carbon), and TTL chip numbers (be
very specific e.g., 74LS00). Pin numbers are required only for
lab.
Students are encouraged to go to the last 2 hours of the other
lab periods (including when EE345L labs are scheduled), but the
first priority will be to the regular students. Because of the
lab quiz, the first hour of lab is restricted to the regular students.
CLEAR OUT BY 15 minutes before the start of lab. At the end of the semester please verify with the checkout counter
that your record is clear. All reports must be given to the TA
by Friday May 7, 12 noon.
Legal Stuff: Drop date is June 16. After this date, I will sign a drop only
if the Dean approves it. Your current grade status must be a "C"
or better for you to receive a "Q". Course evaluation is conducted
on the last class day in accordance with the Measurement and Evaluation
Center form. The final exam is at the time and place stated in
the course schedule. The University of Texas at Austin provides
upon request appropriate academic adjustments for qualified students
with disabilities. For more information, contact the Office of
the Dean of Students with Disabilities at 471-6259, 471-4241 TDD.
| Date | Chapter | Topic |
| 6/7 | 1,4,7 | EE345L review, SCI interrupts on the 6812 |
| 6/9 | 2 | Lab environment, 6812 debugging techniques |
| 6/14 | 8,6 | Output compare, 6N139 isolation |
| 6/16 | 6 | Period measurement |
| 6/21 | 6 | Input capture, 32 bit period measurement, pulse width measurement |
| 6/23 | 11 | Analog Circuits, amplifiers filters |
| 6/28 | 11,12 | A/D, D/A, data acquisition systems |
| 6/80 | 12,15 | Digital filters |
| 7/5 | 13 | Control Systems |
| 7/7 | 13 | Control Systems |
| 7/12 | 13 | Fuzzy Logic Control Systems |
| 7/14 | 9 | Memory Interfacing |
| 7/19 | Quiz 1, Labs 1-5, Chapters 1-4, 6,11,12 ENS302, regular class time | |
| 7/21 | 9 | Memory Interfacing |
| 7/26 | 9 | Memory Interfacing |
| 7/28 | 5 | Thread synchronization |
| 8/2 | 5 | Semaphores |
| 8/4 | 10 | DMA on the MC68HC708XL36 |
| 8/9 | 14 | Modems |
| 8/11 | all | Review, course evaluation |
| 8/13 | All Lab notebooks are due to the TA at 12 noon | |
| 8/13 | Turn in Lab Equipment so that Mona won’t bar your registration | |
| 8/16 | Final exam, Monday, Aug 16, 7-10pm, Room regularly scheduled |
Cheating: Cheating is very uncivilized behavior and is to be avoided at
all cost. You are allowed to talk to your classmates about the
lab assignments, but you are NOT allowed to look at each other’s written work. Oral discussion about an assignment is encouraged and is not considered to be cheating. Copying of any part of a program is
cheating without explicit reference to its source. If we find
two programs that are copied, there will be a substantial penalty
to both students, e.g., failure in the course. Students who cheat
on tests or in lab will fail. Prosecution of cases is very traumatic
to both the student and instructor. PLEASE DO YOUR OWN WORK. Policies concerning the use of other peoples’ software in this
class:
• I strongly encourage you to study existing software.
• All applications and libraries must be legally obtained.
E.g.,
You may use libraries that came when you bought a compiler.
You may use software obtained from a BBS or on the WWW.
You may copy and paste from the existing source code.
• You may use any existing source code that is clearly referenced
and categorized:
original: completely written by you,
derived: fundamental approach is copied but it is your
implementation,
modified: source code significantly edited to serve your
purpose,
copied: source code includes minor modifications.
Places to buy prototyping boards and other parts
In Austin Mail Order
AlTex Electronics 832-9131 BG Micro, Dallas 1-800-276-2206
http://www.bgmicro.com
Tinkertronics 926-4420 All Electronics, Los Angeles 1-800-826-5432
http://www.allcorp.com
Radio Shack Jameco, Belmont CA 1-800-831-4242 http://www.jameco.com
TechAmerica, Fort Worth, 1-800-877-0072
Hosfelt, Steubenville, OH, 1-888-264-6464, 1-800-524-6464
STUDY GUIDE Quiz Final
| Lab | Important Topics |
| 1 | SCI interrupts, RS232 drivers, software device driver |
| 2 | Output compare signal generation, 6N139 optocoupler, back EMF, pulse width modulation, MOSFET interface |
| 3 | IR detector interface, input capture measurements of pulse width, output compare interrupts |
| 4 | D/A interface, D/A signal generation |
| 5 | 6812 A/D, analog amplifiers, analog filters, digital filters, fixed point numbers, resistor bridge, op amps |
| 6 | Control system, either PID or Fuzzy, periodic interrupts, AC to TTL conversion, input capture measurement of period, discrete derivative |
| 7 | Memory interface, address decoders, timing diagrams, memory testing, single chip versus expanded mode |
When studying, focus on the topics that apply to the 6812 and
the topics included in the lab assignments.
| Chapter (new) | Topic |
| 1.5, 2, 4.15 | 6812 architecture and assembly language, interpreting output of the C compiler (parameters, locals globals, critical sections) |
| 4.1.5 | fifo’s, statically allocated linked lists, dynamically allocated linked lists |
| 3, 4 | Choosing between real time, gadfly, interrupts, periodic polling, DMA |
| 8.4, 8.5 | Pulse-width modulated DC motors, solenoids, DC motors, back EMF |
| 11.10 | built-in A/D converter |
| 4 | Interrupts, latency, real time interrupts, periodic polling |
| 6 | Output compare, 6N139 isolation, simple period measurement, input capture, 32 bit period measurement, pulse width measurement, pulse-width modulation |
| 11, 12 | Analog Circuits, amplifiers filters, A/D, D/A, data acquisition systems |
| 11.9, 15 | Digital filters implementations, multiple access circular queue |
| 13 | Control Systems, open loop, closed loop, PID implementations, Fuzzy Logic design and implementation |
| 9 | Address decoding, timing syntax, synchronous, partially asynchronous, fully asynchronous, general approach to interfacing, interface of RAM and ROM to a 6812 in expanded narrow mode, interface of a RAM and ROM to a 6812 in expanded wide mode, data bus drivers (no 16 bit, paged memory, 6811, DRAM, parity check) |
| 10 | DMA concepts, single vs. dual cycle, block (burst) vs. cycle steal, software synchronization, bandwidth, latency, address increment, block size, autoinitialization (reloads parameters and loops continuously) |
| 14.9 | Modems |
| Quiz Guarantees | Final Guarantees |
| Interrupts data structures, latency, priority |
Interrupts multiple sources, synchronization |
| DAS analog circuit, A/D, D/A, precision, sampling rates |
memory interface timing analysis, diagrams, design, CS initialization |
| input capture or output compare period, pulse width, phase, |
Control implementation rather than design |