LaunchPad.h

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#ifndef __LAUNCHPAD_H__
#define __LAUNCHPAD_H__
#include <stdint.h>
 
#define RED1 1
#define BLUE (1<<22)
#define RED (1<<26)
#define GREEN (1<<27)
#define S1 (1<<18)
#define S2 (1<<21)
 
void LaunchPad_Init(void);
 
 
uint32_t LaunchPad_InS1(void);
 
 
uint32_t LaunchPad_InS2(void);
 
void LaunchPad_LED1(uint32_t led);
 
 
void LaunchPad_LED1on(void);
 
 
void LaunchPad_LED1off(void);
 
void LaunchPad_LED(uint32_t led);
 
 
void LaunchPad_LEDwhite(void);
 
 
void LaunchPad_LEDoff(void);
 
//                      Mode2     Mode3     Mode4     Mode5     Mode6     Mode7     Mode8     Mode9
#define PA0INDEX   0 // UART0_TX  I2C0_SDA  TIMA0_C0  TIMA_FAL1 TIMG8_C1  FCC_IN
#define PA1INDEX   1 // UART0_RX  I2C0_SCL  TIMA0_C1  TIMA_FAL2 TIMG8_IDX TIMG8_C0
#define PA2INDEX   6 // TIMG8_C1  SPI0_CS0  TIMG7_C1  SPI1_CS0
#define PA3INDEX   7 // TIMG8_C0  SPI0_CS1  UART2_CTS TIMA0_C2  COMP1_OUT TIMG7_C0  TIMA0_C1  I2C1_SDA
#define PA4INDEX   8 // TIMG8_C1  SPI0_POCI UART2_RTS TIMA0_C3  LFCLK_IN  TIMG7_C1  TIMA0_C1N I2C1_SCL
#define PA5INDEX   9 // TIMG8_C0  SPI0_PICO TIMA_FAL1 TIMG0_C0  TIMG6_C0  FCC_IN
#define PA6INDEX  10 // TTIMG8_C1 SPI0_SCK  TIMA_FAL0 TIMG0_C1  HFCLK_IN  TIMG6_C1  TIMA0_C2N
#define PA7INDEX  13 // COMP0_OUT CLK_OUT   TIMG8_C0  TIMA0_C2  TIMG8_IDX TIMG7_C1  TIMA0_C1
#define PA8INDEX  18 // UART1_TX  SPI0_CS0  UART0_RTS TIMA0_C0  TIMA1_C0N
#define PA9INDEX  19 // UART1_RX  SPI0_PICO UART0_CTS TIMA0_C1  RTC_OUT   TIMA0_C0N TIMA1_C1N CLK_OUT
#define PA10INDEX 20 // UART0_TX  SPI0_POCI I2C0_SDA  TIMA1_C0  TIMG12_C0 TIMA0_C2  I2C1_SDA  CLK_OUT
#define PA11INDEX 21 // UART0_RX  SPI0_SCK  I2C0_SCL  TIMA1_C1  COMP0_OUT TIMA0_C2N I2C1_SCL
#define PA12INDEX 33 // UART3_CTS SPI0_SCK  TIMG0_C0  CAN_TX    TIMA0_C3  FCC_IN
#define PA13INDEX 34 // UART3_RTS SPI0_POCI UART3_RX  TIMG0_C1  CAN_RX    TIMA0_C3N
#define PA14INDEX 35 // UART0_CTS SPI0_PICO UART3_TX  TIMG12_C0 CLK_OUT
#define PA15INDEX 36 // UART0_RTS SPI1_CS2  I2C1_SCL  TIMA1_C0  TIMG8_IDX TIMA1_C0N TIMA0_C2
#define PA16INDEX 37 // COMP2_OUT SPI1_POCI I2C1_SDA  TIMA1_C1  TIMA1_C1N TIMA0_C2N FCC_IN
#define PA17INDEX 38 // UART1_TX  SPI1_SCK  I2C1_SCL  TIMA0_C3  TIMG7_C0  TIMA1_C0
#define PA18INDEX 39 // UART1_RX  SPI1_PICO I2C1_SDA  TIMA0_C3N TIMG7_C1  TIMA1_C1
#define PA19INDEX 40 // SWDIO
#define PA20INDEX 41 // SWCLK
#define PA21INDEX 45 // UART2_TX  TIMG8_C0  UART1_CTS TIMA0_C0  TIMG6_C0
#define PA22INDEX 46 // UART2_RX  TIMG8_C1  UART1_RTS TIMA0_C1  CLK_OUT   TIMA0_C0N TIMG6_C1
#define PA23INDEX 52 // UART2_TX  SPI0_CS3  TIMA0_C3  TIMG0_C0  UART3_CTS TIMG7_C0  TIMG8_C0
#define PA24INDEX 53 // UART2_RX  SPI0_CS2  TIMA0_C3N TIMG0_C1  UART3_RTS TIMG7_C1  TIMA1_C1
#define PA25INDEX 54 // UART3_RX  SPI1_CS3  TIMG12_C1 TIMA0_C3  TIMA0_C1N
#define PA26INDEX 58 // UART3_TX  SPI1_CS0  TIMG8_C0  TIMA_FAL0 CAN_TX    TIMG7_C0
#define PA27INDEX 59 // RTC_OUT   SPI1_CS1  TIMG8_C1  TIMA_FAL2 CAN_RX    TIMG7_C1
#define PA28INDEX  2 // UART0_TX  I2C0_SDA  TIMA0_C3  TIMA_FAL0 TIMG7_C0  TIMA1_C0
#define PA29INDEX  3 // I2C1_SCL  UART2_RTS TIMG8_C0  TIMG6_C0
#define PA30INDEX  4 // I2C1_SDA  UART2_CTS TIMG8_C1  TIMG6_C1
#define PA31INDEX  5 // UART0_RX  I2C0_SCL  TIMA0_C3N TIMG12_C1 CLK_OUT   TIMG7_C1  TIMA1_C1
#define PB0INDEX  11 // UART0_TX  SPI1_CS2  TIMA1_C0  TIMA0_C2
#define PB1INDEX  12 // UART0_RX  SPI1_CS3  TIMA1_C1  TIMA0_C2N
#define PB2INDEX  14 // UART3_TX  UART2_CTS I2C1_SCL  TIMA0_C3  UART1_CTS TIMG6_C0  TIMA1_C0
#define PB3INDEX  15 // UART3_RX  UART2_RTS I2C1_SDA  TIMA0_C3N UART1_RTS TIMG6_C1  TIMA1_C1
#define PB4INDEX  16 // UART1_TX  UART3_CTS TIMA1_C0  TIMA0_C2  TIMA1_C0N
#define PB5INDEX  17 // UART1_RX  UART3_RTS TIMA1_C1  TIMA0_C2N TIMA1_C1N
#define PB6INDEX  22 // UART1_TX  SPI1_CS0  SPI0_CS1  TIMG8_C0  UART2_CTS TIMG6_C0  TIMA1_C0N
#define PB7INDEX  23 // UART1_RX  SPI1_POCI SPI0_CS2  TIMG8_C1  UART2_RTS TIMG6_C1  TIMA1_C1N
#define PB8INDEX  24 // UART1_CTS SPI1_PICO TIMA0_C0  COMP1_OUT
#define PB9INDEX  25 // UART1_RTS SPI1_SCK  TIMA0_C1  TIMA0_C0N
#define PB10INDEX 26 // TIMG0_C0  TIMG8_C0  COMP1_OUT TIMG6_C0
#define PB11INDEX 27 // TIMG0_C1  TIMG8_C1  CLK_OUT   TIMG6_C1
#define PB12INDEX 28 // UART3_TX  TIMA0_C2  TIMA_FAL1 TIMA0_C1
#define PB13INDEX 29 // UART3_RX  TIMA0_C3  TIMG12_C0 TIMA0_C1N
#define PB14INDEX 30 // SPI1_CS3  SPI1_POCI SPI0_CS3  TIMG12_C1 TIMG8_IDX TIMA0_C0
#define PB15INDEX 31 // UART2_TX  SPI1_PICO UART3_CTS TIMG8_C0  TIMG7_C0
#define PB16INDEX 32 // UART2_RX  SPI1_SCK  UART3_RTS TIMG8_C1  TIMG7_C1
#define PB17INDEX 42 // UART2_TX  SPI0_PICO SPI1_CS1  TIMA1_C0  TIMA0_C2
#define PB18INDEX 43 // UART2_RX  SPI0_SCK  SPI1_CS2  TIMA1_C1  TIMA0_C2N
#define PB19INDEX 44 // COMP2_OUT SPI0_POCI TIMG8_C1  UART0_CTS TIMG7_C1
#define PB20INDEX 47 // SPI0_CS2  SPI1_CS0  TIMA0_C2  TIMG12_C0 TIMA_FAL1 TIMA0_C1  TIMA1_C1N
#define PB21INDEX 48 // SPI1_POCI TIMG8_C0
#define PB22INDEX 49 // SPI1_PICO TIMG8_C1
#define PB23INDEX 50 // SPI1_SCK  COMP0_OUT TIMA_FAL0
#define PB24INDEX 51 // SPI0_CS3  SPI0_CS1  TIMA0_C3  TIMG12_C1 TIMA0_C1N TIMA1_C0N
#define PB25INDEX 55 // UART0_CTS SPI0_CS0  TIMA_FAL2
#define PB26INDEX 56 // UART0_RTS SPI0_CS1  TIMA0_C3  TIMG6_C0  TIMA1_C0
#define PB27INDEX 57 // COMP2_OUT SPI1_CS1  TIMA0_C3N TIMG6_C1  TIMA1_C1
 
 
 
#endif // __LAUNCHPAD_H__