;********************************************************* ; ; lm3s1968.s - LM3S1968 Register Definitions ; ; Copyright (c) 2007-2010 Texas Instruments Incorporated. All rights reserved. ; Software License Agreement ; ; Texas Instruments (TI) is supplying this software for use solely and ; exclusively on TI's microcontroller products. The software is owned by ; TI and/or its suppliers, and is protected under applicable copyright ; laws. You may not combine this software with "viral" open-source ; software in order to form a larger program. ; ; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. ; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT ; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR ; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY ; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL ; DAMAGES, FOR ANY REASON WHATSOEVER. ; ; This is part of revision 6075 of the Stellaris Firmware Development Package. ; ;********************************************************* ;edited from C to assembly by Jonathan Valvano 2/17/2013 ;********************************************************* ; ; Watchdog Timer registers (WATCHDOG0) ; ;********************************************************* WATCHDOG0_LOAD_R EQU 0x40000000 WATCHDOG0_VALUE_R EQU 0x40000004 WATCHDOG0_CTL_R EQU 0x40000008 WATCHDOG0_ICR_R EQU 0x4000000C WATCHDOG0_RIS_R EQU 0x40000010 WATCHDOG0_MIS_R EQU 0x40000014 WATCHDOG0_TEST_R EQU 0x40000418 WATCHDOG0_LOCK_R EQU 0x40000C00 ;********************************************************* ; ; GPIO registers (PORTA) ; ;********************************************************* GPIO_PORTA_DATA_BITS_R EQU 0x40004000 GPIO_PORTA_DATA_R EQU 0x400043FC GPIO_PORTA_DIR_R EQU 0x40004400 GPIO_PORTA_IS_R EQU 0x40004404 GPIO_PORTA_IBE_R EQU 0x40004408 GPIO_PORTA_IEV_R EQU 0x4000440C GPIO_PORTA_IM_R EQU 0x40004410 GPIO_PORTA_RIS_R EQU 0x40004414 GPIO_PORTA_MIS_R EQU 0x40004418 GPIO_PORTA_ICR_R EQU 0x4000441C GPIO_PORTA_AFSEL_R EQU 0x40004420 GPIO_PORTA_DR2R_R EQU 0x40004500 GPIO_PORTA_DR4R_R EQU 0x40004504 GPIO_PORTA_DR8R_R EQU 0x40004508 GPIO_PORTA_ODR_R EQU 0x4000450C GPIO_PORTA_PUR_R EQU 0x40004510 GPIO_PORTA_PDR_R EQU 0x40004514 GPIO_PORTA_SLR_R EQU 0x40004518 GPIO_PORTA_DEN_R EQU 0x4000451C GPIO_PORTA_LOCK_R EQU 0x40004520 GPIO_PORTA_CR_R EQU 0x40004524 ;********************************************************* ; ; GPIO registers (PORTB) ; ;********************************************************* GPIO_PORTB_DATA_BITS_R EQU 0x40005000 GPIO_PORTB_DATA_R EQU 0x400053FC GPIO_PORTB_DIR_R EQU 0x40005400 GPIO_PORTB_IS_R EQU 0x40005404 GPIO_PORTB_IBE_R EQU 0x40005408 GPIO_PORTB_IEV_R EQU 0x4000540C GPIO_PORTB_IM_R EQU 0x40005410 GPIO_PORTB_RIS_R EQU 0x40005414 GPIO_PORTB_MIS_R EQU 0x40005418 GPIO_PORTB_ICR_R EQU 0x4000541C GPIO_PORTB_AFSEL_R EQU 0x40005420 GPIO_PORTB_DR2R_R EQU 0x40005500 GPIO_PORTB_DR4R_R EQU 0x40005504 GPIO_PORTB_DR8R_R EQU 0x40005508 GPIO_PORTB_ODR_R EQU 0x4000550C GPIO_PORTB_PUR_R EQU 0x40005510 GPIO_PORTB_PDR_R EQU 0x40005514 GPIO_PORTB_SLR_R EQU 0x40005518 GPIO_PORTB_DEN_R EQU 0x4000551C GPIO_PORTB_LOCK_R EQU 0x40005520 GPIO_PORTB_CR_R EQU 0x40005524 ;********************************************************* ; ; GPIO registers (PORTC) ; ;********************************************************* GPIO_PORTC_DATA_BITS_R EQU 0x40006000 GPIO_PORTC_DATA_R EQU 0x400063FC GPIO_PORTC_DIR_R EQU 0x40006400 GPIO_PORTC_IS_R EQU 0x40006404 GPIO_PORTC_IBE_R EQU 0x40006408 GPIO_PORTC_IEV_R EQU 0x4000640C GPIO_PORTC_IM_R EQU 0x40006410 GPIO_PORTC_RIS_R EQU 0x40006414 GPIO_PORTC_MIS_R EQU 0x40006418 GPIO_PORTC_ICR_R EQU 0x4000641C GPIO_PORTC_AFSEL_R EQU 0x40006420 GPIO_PORTC_DR2R_R EQU 0x40006500 GPIO_PORTC_DR4R_R EQU 0x40006504 GPIO_PORTC_DR8R_R EQU 0x40006508 GPIO_PORTC_ODR_R EQU 0x4000650C GPIO_PORTC_PUR_R EQU 0x40006510 GPIO_PORTC_PDR_R EQU 0x40006514 GPIO_PORTC_SLR_R EQU 0x40006518 GPIO_PORTC_DEN_R EQU 0x4000651C GPIO_PORTC_LOCK_R EQU 0x40006520 GPIO_PORTC_CR_R EQU 0x40006524 ;********************************************************* ; ; GPIO registers (PORTD) ; ;********************************************************* GPIO_PORTD_DATA_BITS_R EQU 0x40007000 GPIO_PORTD_DATA_R EQU 0x400073FC GPIO_PORTD_DIR_R EQU 0x40007400 GPIO_PORTD_IS_R EQU 0x40007404 GPIO_PORTD_IBE_R EQU 0x40007408 GPIO_PORTD_IEV_R EQU 0x4000740C GPIO_PORTD_IM_R EQU 0x40007410 GPIO_PORTD_RIS_R EQU 0x40007414 GPIO_PORTD_MIS_R EQU 0x40007418 GPIO_PORTD_ICR_R EQU 0x4000741C GPIO_PORTD_AFSEL_R EQU 0x40007420 GPIO_PORTD_DR2R_R EQU 0x40007500 GPIO_PORTD_DR4R_R EQU 0x40007504 GPIO_PORTD_DR8R_R EQU 0x40007508 GPIO_PORTD_ODR_R EQU 0x4000750C GPIO_PORTD_PUR_R EQU 0x40007510 GPIO_PORTD_PDR_R EQU 0x40007514 GPIO_PORTD_SLR_R EQU 0x40007518 GPIO_PORTD_DEN_R EQU 0x4000751C GPIO_PORTD_LOCK_R EQU 0x40007520 GPIO_PORTD_CR_R EQU 0x40007524 ;********************************************************* ; ; SSI registers (SSI0) ; ;********************************************************* SSI0_CR0_R EQU 0x40008000 SSI0_CR1_R EQU 0x40008004 SSI0_DR_R EQU 0x40008008 SSI0_SR_R EQU 0x4000800C SSI0_CPSR_R EQU 0x40008010 SSI0_IM_R EQU 0x40008014 SSI0_RIS_R EQU 0x40008018 SSI0_MIS_R EQU 0x4000801C SSI0_ICR_R EQU 0x40008020 ;********************************************************* ; ; SSI registers (SSI1) ; ;********************************************************* SSI1_CR0_R EQU 0x40009000 SSI1_CR1_R EQU 0x40009004 SSI1_DR_R EQU 0x40009008 SSI1_SR_R EQU 0x4000900C SSI1_CPSR_R EQU 0x40009010 SSI1_IM_R EQU 0x40009014 SSI1_RIS_R EQU 0x40009018 SSI1_MIS_R EQU 0x4000901C SSI1_ICR_R EQU 0x40009020 ;********************************************************* ; ; UART registers (UART0) ; ;********************************************************* UART0_DR_R EQU 0x4000C000 UART0_RSR_R EQU 0x4000C004 UART0_ECR_R EQU 0x4000C004 UART0_FR_R EQU 0x4000C018 UART0_ILPR_R EQU 0x4000C020 UART0_IBRD_R EQU 0x4000C024 UART0_FBRD_R EQU 0x4000C028 UART0_LCRH_R EQU 0x4000C02C UART0_CTL_R EQU 0x4000C030 UART0_IFLS_R EQU 0x4000C034 UART0_IM_R EQU 0x4000C038 UART0_RIS_R EQU 0x4000C03C UART0_MIS_R EQU 0x4000C040 UART0_ICR_R EQU 0x4000C044 ;********************************************************* ; ; UART registers (UART1) ; ;********************************************************* UART1_DR_R EQU 0x4000D000 UART1_RSR_R EQU 0x4000D004 UART1_ECR_R EQU 0x4000D004 UART1_FR_R EQU 0x4000D018 UART1_ILPR_R EQU 0x4000D020 UART1_IBRD_R EQU 0x4000D024 UART1_FBRD_R EQU 0x4000D028 UART1_LCRH_R EQU 0x4000D02C UART1_CTL_R EQU 0x4000D030 UART1_IFLS_R EQU 0x4000D034 UART1_IM_R EQU 0x4000D038 UART1_RIS_R EQU 0x4000D03C UART1_MIS_R EQU 0x4000D040 UART1_ICR_R EQU 0x4000D044 ;********************************************************* ; ; UART registers (UART2) ; ;********************************************************* UART2_DR_R EQU 0x4000E000 UART2_RSR_R EQU 0x4000E004 UART2_ECR_R EQU 0x4000E004 UART2_FR_R EQU 0x4000E018 UART2_ILPR_R EQU 0x4000E020 UART2_IBRD_R EQU 0x4000E024 UART2_FBRD_R EQU 0x4000E028 UART2_LCRH_R EQU 0x4000E02C UART2_CTL_R EQU 0x4000E030 UART2_IFLS_R EQU 0x4000E034 UART2_IM_R EQU 0x4000E038 UART2_RIS_R EQU 0x4000E03C UART2_MIS_R EQU 0x4000E040 UART2_ICR_R EQU 0x4000E044 ;********************************************************* ; ; I2C registers (I2C0 MASTER) ; ;********************************************************* I2C0_MASTER_MSA_R EQU 0x40020000 I2C0_MASTER_SOAR_R EQU 0x40020000 I2C0_MASTER_SCSR_R EQU 0x40020004 I2C0_MASTER_MCS_R EQU 0x40020004 I2C0_MASTER_SDR_R EQU 0x40020008 I2C0_MASTER_MDR_R EQU 0x40020008 I2C0_MASTER_MTPR_R EQU 0x4002000C I2C0_MASTER_SIMR_R EQU 0x4002000C I2C0_MASTER_SRIS_R EQU 0x40020010 I2C0_MASTER_MIMR_R EQU 0x40020010 I2C0_MASTER_MRIS_R EQU 0x40020014 I2C0_MASTER_SMIS_R EQU 0x40020014 I2C0_MASTER_SICR_R EQU 0x40020018 I2C0_MASTER_MMIS_R EQU 0x40020018 I2C0_MASTER_MICR_R EQU 0x4002001C I2C0_MASTER_MCR_R EQU 0x40020020 ;********************************************************* ; ; I2C registers (I2C0 SLAVE) ; ;********************************************************* I2C0_SLAVE_MSA_R EQU 0x40020800 I2C0_SLAVE_SOAR_R EQU 0x40020800 I2C0_SLAVE_SCSR_R EQU 0x40020804 I2C0_SLAVE_MCS_R EQU 0x40020804 I2C0_SLAVE_SDR_R EQU 0x40020808 I2C0_SLAVE_MDR_R EQU 0x40020808 I2C0_SLAVE_MTPR_R EQU 0x4002080C I2C0_SLAVE_SIMR_R EQU 0x4002080C I2C0_SLAVE_SRIS_R EQU 0x40020810 I2C0_SLAVE_MIMR_R EQU 0x40020810 I2C0_SLAVE_MRIS_R EQU 0x40020814 I2C0_SLAVE_SMIS_R EQU 0x40020814 I2C0_SLAVE_SICR_R EQU 0x40020818 I2C0_SLAVE_MMIS_R EQU 0x40020818 I2C0_SLAVE_MICR_R EQU 0x4002081C I2C0_SLAVE_MCR_R EQU 0x40020820 ;********************************************************* ; ; I2C registers (I2C1 MASTER) ; ;********************************************************* I2C1_MASTER_MSA_R EQU 0x40021000 I2C1_MASTER_SOAR_R EQU 0x40021000 I2C1_MASTER_SCSR_R EQU 0x40021004 I2C1_MASTER_MCS_R EQU 0x40021004 I2C1_MASTER_SDR_R EQU 0x40021008 I2C1_MASTER_MDR_R EQU 0x40021008 I2C1_MASTER_MTPR_R EQU 0x4002100C I2C1_MASTER_SIMR_R EQU 0x4002100C I2C1_MASTER_SRIS_R EQU 0x40021010 I2C1_MASTER_MIMR_R EQU 0x40021010 I2C1_MASTER_MRIS_R EQU 0x40021014 I2C1_MASTER_SMIS_R EQU 0x40021014 I2C1_MASTER_SICR_R EQU 0x40021018 I2C1_MASTER_MMIS_R EQU 0x40021018 I2C1_MASTER_MICR_R EQU 0x4002101C I2C1_MASTER_MCR_R EQU 0x40021020 ;********************************************************* ; ; I2C registers (I2C1 SLAVE) ; ;********************************************************* I2C1_SLAVE_MSA_R EQU 0x40021800 I2C1_SLAVE_SOAR_R EQU 0x40021800 I2C1_SLAVE_SCSR_R EQU 0x40021804 I2C1_SLAVE_MCS_R EQU 0x40021804 I2C1_SLAVE_SDR_R EQU 0x40021808 I2C1_SLAVE_MDR_R EQU 0x40021808 I2C1_SLAVE_MTPR_R EQU 0x4002180C I2C1_SLAVE_SIMR_R EQU 0x4002180C I2C1_SLAVE_SRIS_R EQU 0x40021810 I2C1_SLAVE_MIMR_R EQU 0x40021810 I2C1_SLAVE_MRIS_R EQU 0x40021814 I2C1_SLAVE_SMIS_R EQU 0x40021814 I2C1_SLAVE_SICR_R EQU 0x40021818 I2C1_SLAVE_MMIS_R EQU 0x40021818 I2C1_SLAVE_MICR_R EQU 0x4002181C I2C1_SLAVE_MCR_R EQU 0x40021820 ;********************************************************* ; ; GPIO registers (PORTE) ; ;********************************************************* GPIO_PORTE_DATA_BITS_R EQU 0x40024000 GPIO_PORTE_DATA_R EQU 0x400243FC GPIO_PORTE_DIR_R EQU 0x40024400 GPIO_PORTE_IS_R EQU 0x40024404 GPIO_PORTE_IBE_R EQU 0x40024408 GPIO_PORTE_IEV_R EQU 0x4002440C GPIO_PORTE_IM_R EQU 0x40024410 GPIO_PORTE_RIS_R EQU 0x40024414 GPIO_PORTE_MIS_R EQU 0x40024418 GPIO_PORTE_ICR_R EQU 0x4002441C GPIO_PORTE_AFSEL_R EQU 0x40024420 GPIO_PORTE_DR2R_R EQU 0x40024500 GPIO_PORTE_DR4R_R EQU 0x40024504 GPIO_PORTE_DR8R_R EQU 0x40024508 GPIO_PORTE_ODR_R EQU 0x4002450C GPIO_PORTE_PUR_R EQU 0x40024510 GPIO_PORTE_PDR_R EQU 0x40024514 GPIO_PORTE_SLR_R EQU 0x40024518 GPIO_PORTE_DEN_R EQU 0x4002451C GPIO_PORTE_LOCK_R EQU 0x40024520 GPIO_PORTE_CR_R EQU 0x40024524 ;********************************************************* ; ; GPIO registers (PORTF) ; ;********************************************************* GPIO_PORTF_DATA_BITS_R EQU 0x40025000 GPIO_PORTF_DATA_R EQU 0x400253FC GPIO_PORTF_DIR_R EQU 0x40025400 GPIO_PORTF_IS_R EQU 0x40025404 GPIO_PORTF_IBE_R EQU 0x40025408 GPIO_PORTF_IEV_R EQU 0x4002540C GPIO_PORTF_IM_R EQU 0x40025410 GPIO_PORTF_RIS_R EQU 0x40025414 GPIO_PORTF_MIS_R EQU 0x40025418 GPIO_PORTF_ICR_R EQU 0x4002541C GPIO_PORTF_AFSEL_R EQU 0x40025420 GPIO_PORTF_DR2R_R EQU 0x40025500 GPIO_PORTF_DR4R_R EQU 0x40025504 GPIO_PORTF_DR8R_R EQU 0x40025508 GPIO_PORTF_ODR_R EQU 0x4002550C GPIO_PORTF_PUR_R EQU 0x40025510 GPIO_PORTF_PDR_R EQU 0x40025514 GPIO_PORTF_SLR_R EQU 0x40025518 GPIO_PORTF_DEN_R EQU 0x4002551C GPIO_PORTF_LOCK_R EQU 0x40025520 GPIO_PORTF_CR_R EQU 0x40025524 ;********************************************************* ; ; GPIO registers (PORTG) ; ;********************************************************* GPIO_PORTG_DATA_BITS_R EQU 0x40026000 GPIO_PORTG_DATA_R EQU 0x400263FC GPIO_PORTG_DIR_R EQU 0x40026400 GPIO_PORTG_IS_R EQU 0x40026404 GPIO_PORTG_IBE_R EQU 0x40026408 GPIO_PORTG_IEV_R EQU 0x4002640C GPIO_PORTG_IM_R EQU 0x40026410 GPIO_PORTG_RIS_R EQU 0x40026414 GPIO_PORTG_MIS_R EQU 0x40026418 GPIO_PORTG_ICR_R EQU 0x4002641C GPIO_PORTG_AFSEL_R EQU 0x40026420 GPIO_PORTG_DR2R_R EQU 0x40026500 GPIO_PORTG_DR4R_R EQU 0x40026504 GPIO_PORTG_DR8R_R EQU 0x40026508 GPIO_PORTG_ODR_R EQU 0x4002650C GPIO_PORTG_PUR_R EQU 0x40026510 GPIO_PORTG_PDR_R EQU 0x40026514 GPIO_PORTG_SLR_R EQU 0x40026518 GPIO_PORTG_DEN_R EQU 0x4002651C GPIO_PORTG_LOCK_R EQU 0x40026520 GPIO_PORTG_CR_R EQU 0x40026524 ;********************************************************* ; ; GPIO registers (PORTH) ; ;********************************************************* GPIO_PORTH_DATA_BITS_R EQU 0x40027000 GPIO_PORTH_DATA_R EQU 0x400273FC GPIO_PORTH_DIR_R EQU 0x40027400 GPIO_PORTH_IS_R EQU 0x40027404 GPIO_PORTH_IBE_R EQU 0x40027408 GPIO_PORTH_IEV_R EQU 0x4002740C GPIO_PORTH_IM_R EQU 0x40027410 GPIO_PORTH_RIS_R EQU 0x40027414 GPIO_PORTH_MIS_R EQU 0x40027418 GPIO_PORTH_ICR_R EQU 0x4002741C GPIO_PORTH_AFSEL_R EQU 0x40027420 GPIO_PORTH_DR2R_R EQU 0x40027500 GPIO_PORTH_DR4R_R EQU 0x40027504 GPIO_PORTH_DR8R_R EQU 0x40027508 GPIO_PORTH_ODR_R EQU 0x4002750C GPIO_PORTH_PUR_R EQU 0x40027510 GPIO_PORTH_PDR_R EQU 0x40027514 GPIO_PORTH_SLR_R EQU 0x40027518 GPIO_PORTH_DEN_R EQU 0x4002751C GPIO_PORTH_LOCK_R EQU 0x40027520 GPIO_PORTH_CR_R EQU 0x40027524 ;********************************************************* ; ; PWM registers (PWM) ; ;********************************************************* PWM_CTL_R EQU 0x40028000 PWM_SYNC_R EQU 0x40028004 PWM_ENABLE_R EQU 0x40028008 PWM_INVERT_R EQU 0x4002800C PWM_FAULT_R EQU 0x40028010 PWM_INTEN_R EQU 0x40028014 PWM_RIS_R EQU 0x40028018 PWM_ISC_R EQU 0x4002801C PWM_STATUS_R EQU 0x40028020 PWM_0_CTL_R EQU 0x40028040 PWM_0_INTEN_R EQU 0x40028044 PWM_0_RIS_R EQU 0x40028048 PWM_0_ISC_R EQU 0x4002804C PWM_0_LOAD_R EQU 0x40028050 PWM_0_COUNT_R EQU 0x40028054 PWM_0_CMPA_R EQU 0x40028058 PWM_0_CMPB_R EQU 0x4002805C PWM_0_GENA_R EQU 0x40028060 PWM_0_GENB_R EQU 0x40028064 PWM_0_DBCTL_R EQU 0x40028068 PWM_0_DBRISE_R EQU 0x4002806C PWM_0_DBFALL_R EQU 0x40028070 PWM_1_CTL_R EQU 0x40028080 PWM_1_INTEN_R EQU 0x40028084 PWM_1_RIS_R EQU 0x40028088 PWM_1_ISC_R EQU 0x4002808C PWM_1_LOAD_R EQU 0x40028090 PWM_1_COUNT_R EQU 0x40028094 PWM_1_CMPA_R EQU 0x40028098 PWM_1_CMPB_R EQU 0x4002809C PWM_1_GENA_R EQU 0x400280A0 PWM_1_GENB_R EQU 0x400280A4 PWM_1_DBCTL_R EQU 0x400280A8 PWM_1_DBRISE_R EQU 0x400280AC PWM_1_DBFALL_R EQU 0x400280B0 PWM_2_CTL_R EQU 0x400280C0 PWM_2_INTEN_R EQU 0x400280C4 PWM_2_RIS_R EQU 0x400280C8 PWM_2_ISC_R EQU 0x400280CC PWM_2_LOAD_R EQU 0x400280D0 PWM_2_COUNT_R EQU 0x400280D4 PWM_2_CMPA_R EQU 0x400280D8 PWM_2_CMPB_R EQU 0x400280DC PWM_2_GENA_R EQU 0x400280E0 PWM_2_GENB_R EQU 0x400280E4 PWM_2_DBCTL_R EQU 0x400280E8 PWM_2_DBRISE_R EQU 0x400280EC PWM_2_DBFALL_R EQU 0x400280F0 ;********************************************************* ; ; QEI registers (QEI0) ; ;********************************************************* QEI0_CTL_R EQU 0x4002C000 QEI0_STAT_R EQU 0x4002C004 QEI0_POS_R EQU 0x4002C008 QEI0_MAXPOS_R EQU 0x4002C00C QEI0_LOAD_R EQU 0x4002C010 QEI0_TIME_R EQU 0x4002C014 QEI0_COUNT_R EQU 0x4002C018 QEI0_SPEED_R EQU 0x4002C01C QEI0_INTEN_R EQU 0x4002C020 QEI0_RIS_R EQU 0x4002C024 QEI0_ISC_R EQU 0x4002C028 ;********************************************************* ; ; QEI registers (QEI1) ; ;********************************************************* QEI1_CTL_R EQU 0x4002D000 QEI1_STAT_R EQU 0x4002D004 QEI1_POS_R EQU 0x4002D008 QEI1_MAXPOS_R EQU 0x4002D00C QEI1_LOAD_R EQU 0x4002D010 QEI1_TIME_R EQU 0x4002D014 QEI1_COUNT_R EQU 0x4002D018 QEI1_SPEED_R EQU 0x4002D01C QEI1_INTEN_R EQU 0x4002D020 QEI1_RIS_R EQU 0x4002D024 QEI1_ISC_R EQU 0x4002D028 ;********************************************************* ; ; Timer registers (TIMER0) ; ;********************************************************* TIMER0_CFG_R EQU 0x40030000 TIMER0_TAMR_R EQU 0x40030004 TIMER0_TBMR_R EQU 0x40030008 TIMER0_CTL_R EQU 0x4003000C TIMER0_IMR_R EQU 0x40030018 TIMER0_RIS_R EQU 0x4003001C TIMER0_MIS_R EQU 0x40030020 TIMER0_ICR_R EQU 0x40030024 TIMER0_TAILR_R EQU 0x40030028 TIMER0_TBILR_R EQU 0x4003002C TIMER0_TAMATCHR_R EQU 0x40030030 TIMER0_TBMATCHR_R EQU 0x40030034 TIMER0_TAPR_R EQU 0x40030038 TIMER0_TBPR_R EQU 0x4003003C TIMER0_TAPMR_R EQU 0x40030040 TIMER0_TBPMR_R EQU 0x40030044 TIMER0_TAR_R EQU 0x40030048 TIMER0_TBR_R EQU 0x4003004C ;********************************************************* ; ; Timer registers (TIMER1) ; ;********************************************************* TIMER1_CFG_R EQU 0x40031000 TIMER1_TAMR_R EQU 0x40031004 TIMER1_TBMR_R EQU 0x40031008 TIMER1_CTL_R EQU 0x4003100C TIMER1_IMR_R EQU 0x40031018 TIMER1_RIS_R EQU 0x4003101C TIMER1_MIS_R EQU 0x40031020 TIMER1_ICR_R EQU 0x40031024 TIMER1_TAILR_R EQU 0x40031028 TIMER1_TBILR_R EQU 0x4003102C TIMER1_TAMATCHR_R EQU 0x40031030 TIMER1_TBMATCHR_R EQU 0x40031034 TIMER1_TAPR_R EQU 0x40031038 TIMER1_TBPR_R EQU 0x4003103C TIMER1_TAPMR_R EQU 0x40031040 TIMER1_TBPMR_R EQU 0x40031044 TIMER1_TAR_R EQU 0x40031048 TIMER1_TBR_R EQU 0x4003104C ;********************************************************* ; ; Timer registers (TIMER2) ; ;********************************************************* TIMER2_CFG_R EQU 0x40032000 TIMER2_TAMR_R EQU 0x40032004 TIMER2_TBMR_R EQU 0x40032008 TIMER2_CTL_R EQU 0x4003200C TIMER2_IMR_R EQU 0x40032018 TIMER2_RIS_R EQU 0x4003201C TIMER2_MIS_R EQU 0x40032020 TIMER2_ICR_R EQU 0x40032024 TIMER2_TAILR_R EQU 0x40032028 TIMER2_TBILR_R EQU 0x4003202C TIMER2_TAMATCHR_R EQU 0x40032030 TIMER2_TBMATCHR_R EQU 0x40032034 TIMER2_TAPR_R EQU 0x40032038 TIMER2_TBPR_R EQU 0x4003203C TIMER2_TAPMR_R EQU 0x40032040 TIMER2_TBPMR_R EQU 0x40032044 TIMER2_TAR_R EQU 0x40032048 TIMER2_TBR_R EQU 0x4003204C ;********************************************************* ; ; Timer registers (TIMER3) ; ;********************************************************* TIMER3_CFG_R EQU 0x40033000 TIMER3_TAMR_R EQU 0x40033004 TIMER3_TBMR_R EQU 0x40033008 TIMER3_CTL_R EQU 0x4003300C TIMER3_IMR_R EQU 0x40033018 TIMER3_RIS_R EQU 0x4003301C TIMER3_MIS_R EQU 0x40033020 TIMER3_ICR_R EQU 0x40033024 TIMER3_TAILR_R EQU 0x40033028 TIMER3_TBILR_R EQU 0x4003302C TIMER3_TAMATCHR_R EQU 0x40033030 TIMER3_TBMATCHR_R EQU 0x40033034 TIMER3_TAPR_R EQU 0x40033038 TIMER3_TBPR_R EQU 0x4003303C TIMER3_TAPMR_R EQU 0x40033040 TIMER3_TBPMR_R EQU 0x40033044 TIMER3_TAR_R EQU 0x40033048 TIMER3_TBR_R EQU 0x4003304C ;********************************************************* ; ; ADC registers (ADC0) ; ;********************************************************* ADC0_ACTSS_R EQU 0x40038000 ADC0_RIS_R EQU 0x40038004 ADC0_IM_R EQU 0x40038008 ADC0_ISC_R EQU 0x4003800C ADC0_OSTAT_R EQU 0x40038010 ADC0_EMUX_R EQU 0x40038014 ADC0_USTAT_R EQU 0x40038018 ADC0_SSPRI_R EQU 0x40038020 ADC0_PSSI_R EQU 0x40038028 ADC0_SAC_R EQU 0x40038030 ADC0_SSMUX0_R EQU 0x40038040 ADC0_SSCTL0_R EQU 0x40038044 ADC0_SSFIFO0_R EQU 0x40038048 ADC0_SSFSTAT0_R EQU 0x4003804C ADC0_SSMUX1_R EQU 0x40038060 ADC0_SSCTL1_R EQU 0x40038064 ADC0_SSFIFO1_R EQU 0x40038068 ADC0_SSFSTAT1_R EQU 0x4003806C ADC0_SSMUX2_R EQU 0x40038080 ADC0_SSCTL2_R EQU 0x40038084 ADC0_SSFIFO2_R EQU 0x40038088 ADC0_SSFSTAT2_R EQU 0x4003808C ADC0_SSMUX3_R EQU 0x400380A0 ADC0_SSCTL3_R EQU 0x400380A4 ADC0_SSFIFO3_R EQU 0x400380A8 ADC0_SSFSTAT3_R EQU 0x400380AC ADC0_TMLB_R EQU 0x40038100 ;********************************************************* ; ; Comparator registers (COMP) ; ;********************************************************* COMP_ACMIS_R EQU 0x4003C000 COMP_ACRIS_R EQU 0x4003C004 COMP_ACINTEN_R EQU 0x4003C008 COMP_ACREFCTL_R EQU 0x4003C010 COMP_ACSTAT0_R EQU 0x4003C020 COMP_ACCTL0_R EQU 0x4003C024 COMP_ACSTAT1_R EQU 0x4003C040 COMP_ACCTL1_R EQU 0x4003C044 COMP_ACSTAT2_R EQU 0x4003C060 COMP_ACCTL2_R EQU 0x4003C064 ;********************************************************* ; ; Hibernation module registers (HIB) ; ;********************************************************* HIB_RTCC_R EQU 0x400FC000 HIB_RTCM0_R EQU 0x400FC004 HIB_RTCM1_R EQU 0x400FC008 HIB_RTCLD_R EQU 0x400FC00C HIB_CTL_R EQU 0x400FC010 HIB_IM_R EQU 0x400FC014 HIB_RIS_R EQU 0x400FC018 HIB_MIS_R EQU 0x400FC01C HIB_IC_R EQU 0x400FC020 HIB_RTCT_R EQU 0x400FC024 HIB_DATA_R EQU 0x400FC030 ;********************************************************* ; ; FLASH registers (FLASH CTRL) ; ;********************************************************* FLASH_FMA_R EQU 0x400FD000 FLASH_FMD_R EQU 0x400FD004 FLASH_FMC_R EQU 0x400FD008 FLASH_FCRIS_R EQU 0x400FD00C FLASH_FCIM_R EQU 0x400FD010 FLASH_FCMISC_R EQU 0x400FD014 FLASH_USECRL_R EQU 0x400FE140 FLASH_USERDBG_R EQU 0x400FE1D0 FLASH_USERREG0_R EQU 0x400FE1E0 FLASH_USERREG1_R EQU 0x400FE1E4 FLASH_FMPRE0_R EQU 0x400FE200 FLASH_FMPRE1_R EQU 0x400FE204 FLASH_FMPRE2_R EQU 0x400FE208 FLASH_FMPRE3_R EQU 0x400FE20C FLASH_FMPPE0_R EQU 0x400FE400 FLASH_FMPPE1_R EQU 0x400FE404 FLASH_FMPPE2_R EQU 0x400FE408 FLASH_FMPPE3_R EQU 0x400FE40C ;********************************************************* ; ; System Control registers (SYSCTL) ; ;********************************************************* SYSCTL_DID0_R EQU 0x400FE000 SYSCTL_DID1_R EQU 0x400FE004 SYSCTL_DC0_R EQU 0x400FE008 SYSCTL_DC1_R EQU 0x400FE010 SYSCTL_DC2_R EQU 0x400FE014 SYSCTL_DC3_R EQU 0x400FE018 SYSCTL_DC4_R EQU 0x400FE01C SYSCTL_PBORCTL_R EQU 0x400FE030 SYSCTL_LDOPCTL_R EQU 0x400FE034 SYSCTL_SRCR0_R EQU 0x400FE040 SYSCTL_SRCR1_R EQU 0x400FE044 SYSCTL_SRCR2_R EQU 0x400FE048 SYSCTL_RIS_R EQU 0x400FE050 SYSCTL_IMC_R EQU 0x400FE054 SYSCTL_MISC_R EQU 0x400FE058 SYSCTL_RESC_R EQU 0x400FE05C SYSCTL_RCC_R EQU 0x400FE060 SYSCTL_PLLCFG_R EQU 0x400FE064 SYSCTL_RCC2_R EQU 0x400FE070 SYSCTL_RCGC0_R EQU 0x400FE100 SYSCTL_RCGC1_R EQU 0x400FE104 SYSCTL_RCGC2_R EQU 0x400FE108 SYSCTL_SCGC0_R EQU 0x400FE110 SYSCTL_SCGC1_R EQU 0x400FE114 SYSCTL_SCGC2_R EQU 0x400FE118 SYSCTL_DCGC0_R EQU 0x400FE120 SYSCTL_DCGC1_R EQU 0x400FE124 SYSCTL_DCGC2_R EQU 0x400FE128 SYSCTL_DSLPCLKCFG_R EQU 0x400FE144 ;********************************************************* ; ; The following are defines for the bit fields in the SYSCTL_RCGC2 register. ; ;********************************************************* SYSCTL_RCGC2_GPIOH EQU 0x00000080 ; Port H Clock Gating Control SYSCTL_RCGC2_GPIOG EQU 0x00000040 ; Port G Clock Gating Control SYSCTL_RCGC2_GPIOF EQU 0x00000020 ; Port F Clock Gating Control SYSCTL_RCGC2_GPIOE EQU 0x00000010 ; Port E Clock Gating Control SYSCTL_RCGC2_GPIOD EQU 0x00000008 ; Port D Clock Gating Control SYSCTL_RCGC2_GPIOC EQU 0x00000004 ; Port C Clock Gating Control SYSCTL_RCGC2_GPIOB EQU 0x00000002 ; Port B Clock Gating Control SYSCTL_RCGC2_GPIOA EQU 0x00000001 ; Port A Clock Gating Control ;********************************************************* ; ; NVIC registers (NVIC) ; ;********************************************************* NVIC_INT_TYPE_R EQU 0xE000E004 NVIC_ST_CTRL_R EQU 0xE000E010 NVIC_ST_RELOAD_R EQU 0xE000E014 NVIC_ST_CURRENT_R EQU 0xE000E018 NVIC_ST_CAL_R EQU 0xE000E01C NVIC_EN0_R EQU 0xE000E100 NVIC_EN1_R EQU 0xE000E104 NVIC_DIS0_R EQU 0xE000E180 NVIC_DIS1_R EQU 0xE000E184 NVIC_PEND0_R EQU 0xE000E200 NVIC_PEND1_R EQU 0xE000E204 NVIC_UNPEND0_R EQU 0xE000E280 NVIC_UNPEND1_R EQU 0xE000E284 NVIC_ACTIVE0_R EQU 0xE000E300 NVIC_ACTIVE1_R EQU 0xE000E304 NVIC_PRI0_R EQU 0xE000E400 NVIC_PRI1_R EQU 0xE000E404 NVIC_PRI2_R EQU 0xE000E408 NVIC_PRI3_R EQU 0xE000E40C NVIC_PRI4_R EQU 0xE000E410 NVIC_PRI5_R EQU 0xE000E414 NVIC_PRI6_R EQU 0xE000E418 NVIC_PRI7_R EQU 0xE000E41C NVIC_PRI8_R EQU 0xE000E420 NVIC_PRI9_R EQU 0xE000E424 NVIC_PRI10_R EQU 0xE000E428 NVIC_CPUID_R EQU 0xE000ED00 NVIC_INT_CTRL_R EQU 0xE000ED04 NVIC_VTABLE_R EQU 0xE000ED08 NVIC_APINT_R EQU 0xE000ED0C NVIC_SYS_CTRL_R EQU 0xE000ED10 NVIC_CFG_CTRL_R EQU 0xE000ED14 NVIC_SYS_PRI1_R EQU 0xE000ED18 NVIC_SYS_PRI2_R EQU 0xE000ED1C NVIC_SYS_PRI3_R EQU 0xE000ED20 NVIC_SYS_HND_CTRL_R EQU 0xE000ED24 NVIC_FAULT_STAT_R EQU 0xE000ED28 NVIC_HFAULT_STAT_R EQU 0xE000ED2C NVIC_DEBUG_STAT_R EQU 0xE000ED30 NVIC_MM_ADDR_R EQU 0xE000ED34 NVIC_FAULT_ADDR_R EQU 0xE000ED38 NVIC_MPU_TYPE_R EQU 0xE000ED90 NVIC_MPU_CTRL_R EQU 0xE000ED94 NVIC_MPU_NUMBER_R EQU 0xE000ED98 NVIC_MPU_BASE_R EQU 0xE000ED9C NVIC_MPU_ATTR_R EQU 0xE000EDA0 NVIC_DBG_CTRL_R EQU 0xE000EDF0 NVIC_DBG_XFER_R EQU 0xE000EDF4 NVIC_DBG_DATA_R EQU 0xE000EDF8 NVIC_DBG_INT_R EQU 0xE000EDFC NVIC_SW_TRIG_R EQU 0xE000EF00 ;********************************************************* ; ; The following are defines for the bit fields in the NVIC_ST_CTRL register. ; ;********************************************************* NVIC_ST_CTRL_COUNT EQU 0x00010000 ; Count flag NVIC_ST_CTRL_CLK_SRC EQU 0x00000004 ; Clock Source NVIC_ST_CTRL_INTEN EQU 0x00000002 ; Interrupt enable NVIC_ST_CTRL_ENABLE EQU 0x00000001 ; Counter mode ;********************************************************* ; ; The following are defines for the bit fields in the NVIC_ST_RELOAD register. ; ;********************************************************* NVIC_ST_RELOAD_M EQU 0x00FFFFFF ; Counter load value NVIC_ST_RELOAD_S EQU 0 ;********************************************************* ; ; The following are defines for the bit fields in the NVIC_ST_CURRENT ; register. ; ;********************************************************* NVIC_ST_CURRENT_M EQU 0x00FFFFFF ; Counter current value NVIC_ST_CURRENT_S EQU 0 ;********************************************************* ; ; The following are defines for the bit fields in the NVIC_EN0 register. ; ;********************************************************* NVIC_EN0_INT31 EQU 0x80000000 ; Interrupt 31 enable NVIC_EN0_INT30 EQU 0x40000000 ; Interrupt 30 enable NVIC_EN0_INT29 EQU 0x20000000 ; Interrupt 29 enable NVIC_EN0_INT28 EQU 0x10000000 ; Interrupt 28 enable NVIC_EN0_INT27 EQU 0x08000000 ; Interrupt 27 enable NVIC_EN0_INT26 EQU 0x04000000 ; Interrupt 26 enable NVIC_EN0_INT25 EQU 0x02000000 ; Interrupt 25 enable NVIC_EN0_INT24 EQU 0x01000000 ; Interrupt 24 enable NVIC_EN0_INT23 EQU 0x00800000 ; Interrupt 23 enable NVIC_EN0_INT22 EQU 0x00400000 ; Interrupt 22 enable NVIC_EN0_INT21 EQU 0x00200000 ; Interrupt 21 enable NVIC_EN0_INT20 EQU 0x00100000 ; Interrupt 20 enable NVIC_EN0_INT19 EQU 0x00080000 ; Interrupt 19 enable NVIC_EN0_INT18 EQU 0x00040000 ; Interrupt 18 enable NVIC_EN0_INT17 EQU 0x00020000 ; Interrupt 17 enable NVIC_EN0_INT16 EQU 0x00010000 ; Interrupt 16 enable NVIC_EN0_INT15 EQU 0x00008000 ; Interrupt 15 enable NVIC_EN0_INT14 EQU 0x00004000 ; Interrupt 14 enable NVIC_EN0_INT13 EQU 0x00002000 ; Interrupt 13 enable NVIC_EN0_INT12 EQU 0x00001000 ; Interrupt 12 enable NVIC_EN0_INT11 EQU 0x00000800 ; Interrupt 11 enable NVIC_EN0_INT10 EQU 0x00000400 ; Interrupt 10 enable NVIC_EN0_INT9 EQU 0x00000200 ; Interrupt 9 enable NVIC_EN0_INT8 EQU 0x00000100 ; Interrupt 8 enable NVIC_EN0_INT7 EQU 0x00000080 ; Interrupt 7 enable NVIC_EN0_INT6 EQU 0x00000040 ; Interrupt 6 enable NVIC_EN0_INT5 EQU 0x00000020 ; Interrupt 5 enable NVIC_EN0_INT4 EQU 0x00000010 ; Interrupt 4 enable NVIC_EN0_INT3 EQU 0x00000008 ; Interrupt 3 enable NVIC_EN0_INT2 EQU 0x00000004 ; Interrupt 2 enable NVIC_EN0_INT1 EQU 0x00000002 ; Interrupt 1 enable NVIC_EN0_INT0 EQU 0x00000001 ; Interrupt 0 enable ;********************************************************* ; ; The following are defines for the bit fields in NVIC_EN1 register. ; ;********************************************************* NVIC_EN1_INT59 EQU 0x08000000 ; Interrupt 59 enable NVIC_EN1_INT58 EQU 0x04000000 ; Interrupt 58 enable NVIC_EN1_INT57 EQU 0x02000000 ; Interrupt 57 enable NVIC_EN1_INT56 EQU 0x01000000 ; Interrupt 56 enable NVIC_EN1_INT55 EQU 0x00800000 ; Interrupt 55 enable NVIC_EN1_INT54 EQU 0x00400000 ; Interrupt 54 enable NVIC_EN1_INT53 EQU 0x00200000 ; Interrupt 53 enable NVIC_EN1_INT52 EQU 0x00100000 ; Interrupt 52 enable NVIC_EN1_INT51 EQU 0x00080000 ; Interrupt 51 enable NVIC_EN1_INT50 EQU 0x00040000 ; Interrupt 50 enable NVIC_EN1_INT49 EQU 0x00020000 ; Interrupt 49 enable NVIC_EN1_INT48 EQU 0x00010000 ; Interrupt 48 enable NVIC_EN1_INT47 EQU 0x00008000 ; Interrupt 47 enable NVIC_EN1_INT46 EQU 0x00004000 ; Interrupt 46 enable NVIC_EN1_INT45 EQU 0x00002000 ; Interrupt 45 enable NVIC_EN1_INT44 EQU 0x00001000 ; Interrupt 44 enable NVIC_EN1_INT43 EQU 0x00000800 ; Interrupt 43 enable NVIC_EN1_INT42 EQU 0x00000400 ; Interrupt 42 enable NVIC_EN1_INT41 EQU 0x00000200 ; Interrupt 41 enable NVIC_EN1_INT40 EQU 0x00000100 ; Interrupt 40 enable NVIC_EN1_INT39 EQU 0x00000080 ; Interrupt 39 enable NVIC_EN1_INT38 EQU 0x00000040 ; Interrupt 38 enable NVIC_EN1_INT37 EQU 0x00000020 ; Interrupt 37 enable NVIC_EN1_INT36 EQU 0x00000010 ; Interrupt 36 enable NVIC_EN1_INT35 EQU 0x00000008 ; Interrupt 35 enable NVIC_EN1_INT34 EQU 0x00000004 ; Interrupt 34 enable NVIC_EN1_INT33 EQU 0x00000002 ; Interrupt 33 enable NVIC_EN1_INT32 EQU 0x00000001 ; Interrupt 32 enable END