Introduction to CMOS VLSI Design
Instructor Adnan Aziz,
adnan AT ece ADOT utexas ANOTHERDOT edu
Office Hours: TuTh 11:00-noon
Job Openings Sun,
Descriptors Here are the detailed course descriptors for 360R,
and 382M.7 with a breakdown of
prerequisites, lectures, grading policy, test dates, etc.
Unique No. 17235 (383M.7), 16925 (360R)
three questions that you can use to
check if you are ready for the class.
Biography Please fill out this small bio; it really helps me get to
know the class better.
Lab 1 Wednesday 9/26, Lab 2 Wednesday 10/31, Lab 3 Wednesday 11/28,
Midterm 1 Thrusday 10/11, Midterm 2 Tuesday 11/13
Lab 1 Wednesday 9/19, Lab 2 Wednesday 10/17, Lab 3 Wednesday 11/7,
Midterm 1 10/23, Midterm 2 11/20
I will use, with minor modifications,
the excellent notes prepared by David Harris to accompany the text. I've
listed the corresponding sections of the book, but you should read more broadly.
In particular, I would like you to pay particular emphasis
to the "Pifalls and Fallacies" section
concluding each chapter.
CMOS Fabrication and its implications (1.3, 3.1-3.5)
Elementary CMOS logic design and layout (1.4-1.5.5)
See Chris Mack's page for a nice
MOS Device Equations (2.1-2.3.1)
CMOS Logic: Quantiative Analysis (2.3.2-2.6, 4.2)
Logical Effort (4.3)
Simulating Circuits (5 - we won't cover this material, but you may want to brush up on it)
Adders (10.1-10.2) Mathematical treatment of parallel prefix computation
Advanced static gate design (6.1-6.2.1)
Alternatives to static logic (6.2.2-6.2.5, 6.4-6.6)
Sequential Design (7.1-7.5)
CAMs, ROMs, and PLAs (11.4-11.7)
MOS Devices in DSM (2.4)
Circuit Pitfalls (6.3)
Test (4.8, 9)
Low Power (6, with an emphasis on 6.5)
Kevin Nowka's notes on low power design
Design for Skew (7.5-7.6, 12.5)
Packaging, Power Supplies, and I/O (12.2-12.4)
Scaling and Economics (4.9, and 8.5)
Kevin Nowka's notes on variability: very up-to-date,
with lots of hard data
Evolution of Intel processors
Case Study: Cell Processor.
An article detailing the cell processor
Homework problems, solutions, and issues
Midterm 1 sample questions
Midterm 2 questions (Figures for faulty circuits are from the Circuit Pitfalls lecture). The undergrad test is linked here.
Final questions (A couple of figures are missing, but
the intention should be clear.)
Midterm 1: Everything upto but not including interconnect.
Midterm 2: Everything from interconnect upto but not including RAMs.
Final: Everything from start to finish. One 2-sided 8.5x11 cribsheet; no open book/notes.
Midterm 1: Everything upto but not including adders.
Midterm 2: Everything from adders upto but not including DSM.