EE 382N -Announcements
There will be a normal discussion session on Monday April 24.
There will be meetings with the groups who want to discuss some issues with the TAs on Tuesday April 25. Please email Danny or Chang Joo if your group wants to have the meeting.
The exam will be held in ENS 302.
To help you study for the midterm, here is a copy of the
midterm Professor Patt gave the last time he taught 382N (Spring
2004). Although you should not expect to see the same
questions, it should give you a sense of the style of the exam. [spring04 pdf]
There will be the written exam at 5:00PM on Wednesday, March 29. The room will be posted soon.
For the purpose of helping students prepare for the midterm, Professor
Patt likes to provide students with a set of buzzwords which were
mentioned throughout the lectures to date. Please note this isn't
necessarily a complete list of all the topics he covered. [txt]
Several class meetings have been rescheduled, as shown below. The syllabus
has been changed to reflect these items.
March 27: Finish Pentium 4, Pentium M, Niagra, etc. The RISC phenomenon.
April 3: Measurement methodology and abuses
April 4: Current hot topics: Intro to Runahead Execution, Wish Branches, and
L2 cache structures to improve on memory latency.
April 10: Guest lectures by Onur Mutlu on Runahead Execution and Hyesoon Kim
on Wish Branches.
NOTE: lecture will be in ETC 5.148.
April 11: Guest lecture by Moinuddin Qureshi on new L2 cache structures.
Note: Lecture will be in ETC 5.148.
April 12: Cache Coherence
April 17: Future processors, part 1 (starting with the Naysayers)
April 18: Discussion section, as needed.
April 26: Future processors, part 2 (what will the microprocessor look like
No discussion session and class on March 21 and 22. Please meet your group members to prepare for the first design review.
Office Hours Announcement This Week
Chang Joo will hold an office hour from 8:30PM to 10:00PM on Wednesday (03/22) in LRC (ENS 507).
Danny will hold an office hour from 2:30PM to 4:00PM on Thursday (03/23) in LRC (ENS 507).
No other office hours than these this week.
Professor Patt posted a first design review sign-up sheet on his office door (ENS 541). Please sign up for your group's first design review. Note that this meeting will consist of all members of your group, Professor Patt, Danny and Chang Joo.
There is no office hours during spring break.
Due to HPCA, there will be no class and office hours on Monday (02/13) and no discussion session on Tuesday (02/14).
Office hours during the semester.
Danny: M 2:00-3:30pm, TH 3:00-4:30pm in LRC (ENS 507)
Chang Joo: W 8:30-10:00pm, F 2:30-4:00pm in LRC (ENS 507)
No class on February 1. Please attend the seminar in ACES 2.402 and turn in your student information sheet in class on February 6.
Office Hours Announcement
Danny will hold an office hour from 3:00PM to 4:30PM on Thursday (02/02) in LRC (ENS 507)
Chang Joo will hold an office hour from 2:30PM to 4:00PM on Friday (02/03) in LRC (ENS 507)
Talk Title: Design for Testability: The Path to Deep Submicron
Speaker: Thomas W. Williams, Synopsys Fellow
Time & Location: February 1, 2006 at 5:00 p.m. in ACES 2.402
Design has never been simple, but at 130 nm and below-and definitely at 90 nm-it is becoming increasingly
difficult. Process and lithography issues continue to drive our advance to new technology nodes. Due to
the effects of scaling, defect mechanisms are no longer easily identified with single stuck at fault models
but rather are demanding far more complex and challenging solutions. For example, shorts are now being
extracted from the physical layout of a design, with special tests being created to detect them. But this is
just the beginning; delay testing of all transition faults is now a new objective of design for testability (DFT).
New demands are being made on design to not only create the correct function and help with testing but
also to help yield ramp-up. The area of design for manufacturing (DFM) and design for yield (DFY) are
now also talking hold as new requirements for design. Manufacturing and test are beginning to develop an
even stronger relationship due to the close interconnection between yield ramp-up and diagnostics, which
are supported by DFT structures included in the design.
In this presentation, Dr. T.W.Williams addresses these current challenges in the area of design for testability,
manufacturing, yield, and diagnostics. In addition, he will discuss the future challenges facing designers,
and the new tools and methodologies which the design community will be dealing with.
Talk Title: PIRO: Benchmarking a Personal Image Retrieval System
Speaker: Jean-Yves Bouguet, Intel
Time & Location: February 6, 2006 at 11:00 a.m. in ACES 2.402
It is now common to have accumulated tens of thousands of personal pictures. Efficient access to that many pictures can only be done with a robust image retrieval system. This application is of high interest to processor architects. It is highly compute intensive, and could motivate end users to upgrade their personal computers to the next generations of processors.
A key question is how to assess the robustness of a personal image retrieval system. Personal image databases are very different from digital libraries that have been used by many Content Based Image Retrieval Systems. Personal image databases are very different from digital libraries that have been used by many Content Based Image Retrieval Systems. For example a personal image database has a lot of pictures of people, but a small set of different people typically family, relatives, and friends. Pictures are taken in a limited set of places like home, work, school, and vacation destination. The most frequent queries are searched for people, and for places. These attributes, and many others affect how a personal image retrieval system should be benchmarked, and benchmarks need to be different from existing ones based on art images, or medical images for examples.
The attributes of the data set do not change the list of components needed for the benchmarking of such systems as specified in: data sets, query tasks, ground truth, and evaluation measures.
This talk proposes a way to build these components to be representative of personal image databases, and of the corresponding usage models.
Homework 2 has been posted.
There will be no discussion session on 01/27.
Talk Title: How to make a highly secure x86 processor
Speaker: Glenn Henry, Founder, Centaur Corporation
Time & Location: January 30, 2006 at 3:30 p.m. - 4:30 p.m. in ACES 2.402
The talk will cover two topics. First is the design & build
methodology, tools, etc. that allow Centaur to design a
very small 2-GHZ Pentium-4 compatible processor with only
30 designers. Second is a description of Centaur's embedded
high performance security features (such as AES encryption).
The physical design of these security components will be
used as examples to explore the overall design & build methodology.
Glenn Henry is the founder and president of Centaur Technology.
Throughout his career, he has played an integral role in
the development of the computer industry in the U. S..
Prior to founding Centaur in April 1995, Henry served as
a consultant to MIPS Technology (SGI) for one year. From
1988 to 1994 he was Chief Technology Officer and Senior
Vice President of the Product Group at Dell Computer Corporation.
In that position, he was responsible for all product development
activities and, at various times, also responsible for product
marketing, manufacturing, procurement, information systems
and technical support.
Before his tenure at Dell, Henry served 21 years with IBM.
He was the instigator, lead architect and development manager
responsible for the IBM System/32, System38 (forerunner
of AS/400), and RT/PC (forerunner of Power systems). In
1985, he was appointed an IBM Fellow.
Office Hours Announcement
Danny will hold an office hour from 3PM to 4PM on Thursday (01/26) in LRC (ENS 507)
Chang Joo will hold an office hour from 3PM to 4PM on Friday (01/27) in LRC (ENS 507)
There will be extra discussion sessions as follows
5PM 01/20/2006 in room ENS 116
5PM 01/26/2006 in room RLM 5.112
5PM 01/27/2006 in room ENS 116
There will be extra discussion sessions at 5PM on January 19 and 20. We will post the room number soon.
Speaker Name: Leslie Lamport
Speaker Affiliation: Microsoft Research
Talk Title: "The CAL Algorithm Language"
Date: January 26, 2006
Start Time: 11:00a.m.
Location: ACES 2.302
Host: Lorenzo Alvisi
Algorithms are different from programs and should not be
described with programming languages. For example, algorithms are
usually best described in terms of mathematical objects like sets and
graphs instead of the primitive objects like bytes and integers
provided by programming languages. CAL is an algorithm language based
on TLA . A CAL algorithm is translated to a TLA specification that
can then be checked with the TLC model checker.
You may want to bring something to write with.
Student Information Sheet has been changed. Please use the new form and turn in on February 1.
Homework 1a and 1b are posted.
The first meeting of EE382N will be Wednesday's lecture (January 18) in ENS 109.