TI TMS320C6x VLIW DSP Architecture
Two parallel data paths with single-cycle units:
- Data unit - 32-bit address calculations (modulo, linear)
- Multiplier unit - 16 bit x 16 bit with 32-bit result
- Logical unit - 40-bit (saturation) arithmetic & compares
- Shifter unit - 32-bit integer ALU and 40-bit shifter
16 32-bit registers in each data path
- 40 bits can be stored in adjacent even/odd registers
Fixed-point (C62x) and floating-point (C67x)
TMS320C6201: $25 in volume
- 150 MHz, 300 million MACs/sec, 1200 RISC MIPS
- On-chip memory: 16 k x 32 program, 32 k x 16 data