ECE 445S Real-Time Digital Signal Processing Laboratory - Lecture 2
Lecture by Prof. Brian L. Evans
- Lecture slides on
Introduction to Digital Signal Processors in
PowerPoint format.
- Berkeley Design Technology Inc.
- 32-bit IEEE Floating Point Format (float datatype in C on C6700)
- 1 sign bit + 23 mantissa bits + 8 exponent bits
- Equivalent to a 24-bit fractional number or 24-bit integer
with the right exponent setting
- 64-bit IEEE Floating Point Format (double datatype in C on C6700)
- 1 sign bit + 52 mantissa bits + 11 exponent bits
- Equivalent to a 53-bit fractional number or 53-bit integer
with the right exponent setting
- Reading assignments
- "Trends in Multicore DSPs",
by Lina J. Karam (ASU), Ismail AlKamal (ASU), Alan Gatherer (TI),
Gene A. Frantz (TI), David V. Anderson (Georgia Tech), and
Brian L. Evans (UT Austin),
IEEE Signal Processing Magazine,
Nov. 2009.
- "Comparing
Fixed- and Floating-Point DSPs" by Gene Frantz and Ray Simar,
Texas Instruments, 2004
- Spring 2014 lecture on
video: Part 1,
Part 2 and
Part 3.
Supplemental material
- "How to use DSP caches, part 1",
Texas Instruments, May 21, 2007
- Steve Smith,
The Scientist and Engineer's
Guide to Digital Signal Processing,
California Technical Publishing, 1997.
(Complete book is available online.)
- Walt Kester,
Mixed-Signal and DSP Design Techniques,
Newnes, 2003.
This book is available for free online.
- 2004-2005 Notes on DSP processor families
- DSPs in selected products
- Notes on DSP cores
- UC Berkeley talk on digital signal processors by
H. John Reekie and
Edward A. Lee
Last updated 06/07/22.
Send comments to
bevans@ece.utexas.edu