EE445L Microprocessor Applications and Organization Fall 2011
Course Catalog Description Microprocessor organization and interfacing;
memory interfacing; hardware-software design of microprocessor systems; and
applications, including communication systems.
Class: ACA 1.104, Monday, Wednesday, Friday 2-3pm
Office Hours: Tuesday 12noon-1pm, Wednesday 1-1:45pm, Friday
12noon-1pm
Instructor: Jonathan W. Valvano, ENS627, 471-5141
email: valvano@mail.utexas.edu
(put "EE445L" in the email title, send no
ZIP files)
Web page: http://users.ece.utexas.edu/~valvano
Required Text: Embedded Systems: Real-Time Interfacing to the Arm Cortex
M3, 2011, ISBN: 978-1463590154
Required Equipment: EKK-LM3S1968, 22 or 24 gauge solid wire, wire
strippers, and a solderless breadboard
Lab: ENS252A
Unique Numbers:
16780 MW 900 to 1030a Sundeep Korrapati
16785 MW 1030 to 1200p Razik Ahmed
16790 TTH 1100 to 1230p Razik Ahmed
16795 MW 330 to 500p Nachiappan Valliappan
16797 MW 500 to 630p Nachiappan Valliappan
16798 TTH 500 to 630p Sundeep Korrapati
Great TAs :
Nachiappan Valliappan nachi@mail.utexas.edu
Razik Ahmed razik.ahmed@utexas.edu
Sundeep Korrapati sundeep.korrapati@gmail.com
Reference materials on the web:
http://users.ece.utexas.edu/~valvano/EE345L/Lectures/
Lecture notes
http://users.ece.utexas.edu/~valvano/EE345L/Labs/Fall2011/
Fall 2011 Laboratory Manual
http://users.ece.utexas.edu/~valvano/Datasheets
Data sheets for devices used in EE445L
http://users.ece.utexas.edu/~valvano/arm/
Starter files for EE445L and EE345M
http://users.ece.utexas.edu/~ryerraballi/CPrimer/
C programming manual
http://users.ece.utexas.edu/~valvano/EE345LFinal/
Old exams
Other references: For programming in C and digital logic, see the EE312 and EE316
texts
Prerequisites: EE312 and EE319K with a grade of at least C- in
each; EE411 and EE313, or BME311 and BME343, with a grade of at least C- in
each; and credit with a grade of at least C- or registration for BME333T, or EE333T.
Specific EE319K topics needed for EE445L: LED interface, switch
interface, busy-wait synchronization, serial communication concepts (start bit,
data bits, stop bit, baud rate, bandwidth), UART programming, analog to digital
conversion (range, resolution, precision, accuracy), ADC programming, digital
to analog conversion (range, resolution, precision, accuracy), interrupt
concepts (arm, enable, acknowledge, vector), Output compare interrupt
programming
Specific EE312 topics needed for EE445L: Modular programming,
differences between pointers and numbers, when to use permanent allocation and
when to use temporary allocation, definitions of char, short and long,
understanding and use of static, const and volatile,
understanding call by value versus call by reference, stack frames, structures,
linked lists, fifo queues, verification. The most important component students
must be able to accomplish is the translation of a problem statement into
software code. The second most important skill we expect students to have is
the ability to debug software.
Specific EE411/EE313/EE438 topics needed for EE445L: RLC circuits, NPN
and PNP transistors, input impedance, output impedance, linear amplifiers using
op amps, oscilloscopes, sampling, frequency response, Bode Plots, Fourier
Transform, spectrum measurements.
Teaching philosophy: I strongly encourage students to take an
active role in this class. Questions are welcome before, during and after
class. Please feel free to email, visit or call me if you have questions.
Specific Objectives of EE445L The primary objective of
EE445L is for the students to develop the ability to design microcomputer-based
embedded systems. This class allows students to learn microcomputer interfacing
from both a hardware and software perspective.
Microcomputer Architecture (EE319K review)
An Introduction to the Microcomputer, Architecture,
The Cortex M3 Instruction Set, Cortex M3 Addressing Modes, Cortex M3
Instructions, I/O and Memory Organization, The Memory Map of the LM3S1968
Programming Microprocessors (EE312, EE322C review)
Data Structures in C (arrays, tables, linked lists,
stacks, and fifo queues), Writing Quality Programs in C, Passing Parameters
(Conceptual and Implementation Levels), Modular Programming, Verification and
Testing, Documentation
Microcomputer Bus Interfaces
Digital Hardware, Modules and Signals, Drivers,
Registers, Timing equations, Timing diagrams,
Parallel and Serial Input-Output
LM3S1968 Parallel I/O Devices, Device Driver
Software, Buffered Input and Output, Table and Linked List Interpreters,
LM3S1968 Synchronous and Asynchronous Serial Input-Output, Synchronization in
I/O devices, Blind-Cycle Synchronization, Busy-Wait Synchronization, Interrupt
Synchronization, Polled Interrupts, Vectored Interrupts, Interrupt Priority
Parallel Port Interfaces
Keyboards, Key Debouncing, Keyboard Scanning
Techniques, LED Scanning Techniques and LCD Interfacing
Data Acquisition Systems
Bridge
circuits, op amps, low pass filters, instrumentation amplifiers, DAC, ADC,
audio amplifiers
Motor interfacing
Stepper
motors, DC motors, pulse-width modulation
Outcomes: After the successful conclusion of EE445L students should be
able to design embedded systems including hardware/software interfaces for devices
like LCD displays, motors, keyboards, analog sensors and speakers.
Attendance: Students are expected to attend lectures. The book covers
more information than the class and we will use lectures to map our way through
the book. If you miss class you may find it difficult to catch up.
Grading :
40% Laboratory assignment with
a large weight applied to Labs 8, 9 and 11
15% Quiz 1, closed book, Friday,
October 7, 2:00 to 2:50 pm, ACA 1.104
15% Quiz 2, open book, Friday,
November 18, 2:00 to 2:50 pm, ACA 1.104
30% Final, closed/open book, Wednesday,
December 7, 2-5pm, regularly scheduled time and place
When studying, focus on the topics that apply to
the Arm Cortex M3 and the lab assignments. You will find old quizzes and
finals with solutions on the class web site. I have no expected grade
cutoffs or expected GPA for this class. You can view the previous GPAs for most
of your classes at UT (MyEdu reports I give a GPA in this class of 3.25).
All professors want a 5 on their teaching evaluation, and all students want an
A. However, I feel both should only be awarded for excellence.
Lab Partners: All labs should be performed with a partner. You and your
lab partner must be registered for the same lab section. The lab partnership
must be registered with your TA (a simple hand written note signed by both
students will suffice) during the week of 8/29 to 9/1. Once registered, the
partnership will continue. A partnership can be dissolved only after discussion
with the TA. Both partners must be present during the demonstration. It is
expected that both partners will contribute to all aspects of each lab, and
both partners are expected to be present during the check out. The point values
are the same for all labs. Lab partners will be selected in your lab the week
of 8/29 to 9/1. If you want to switch sections, log your request onto the first
page of the wiki. Once you find someone willing to swap sections, the two of
you should go to an undergraduate advisor.
Laboratories
Lab 1. ASCII to fixed-point output to OLED
Lab 2. Debugging, oscilloscope fundamentals, logic analyzer, dump
profile
Lab 3. Alarm clock, LCD, edge-triggered input interrupts, and SysTick
periodic interrupts
Lab 4. Stepper motor, output compare interrupts, finite state machine
Lab 5.12-bit DAC, SPI, Music player, audio amp
Lab 6. Introduction to PCB Layout, PCB
Artist (paper design only)
Lab 7. Temperature measurement, ADC, LCD
Lab 8. Design and Layout of an Embedded System
Lab 9. Software Drivers for an Embedded System
Lab 10. ZigBee, UART, distributed systems, key pad interface
Lab 11. Final Design and Evaluation of Embedded System
EE445L Laboratory Schedule (see your TA for the latest). Each
week there are two 90 minute lab sessions, which are scheduled Monday/Wednesday
or Tuesday/Thursday. You will show the preparation to your TA at the beginning
of the second session. During the first session demonstrations will be made.
The TA will sign your software listing when you demonstrate your system. The
report (hardware/software/data plots) is due Friday at the beginning of
recitation. Any EE445L TA is authorized to checkout your lab. Please
consult with your TA for specific due dates for your lab section.
Lab Schedule This is an approximate schedule,
please check the website for the latest version.
Week |
First session |
Second session |
Friday 2pm |
Comments |
8/24 |
none |
none |
|
no lab activities, buy your LM3S1968 board |
8/29 |
Meet the TA |
partners chosen, 1 Prep |
|
Metrowerks demonstration, PCB Artist (SCH) demonstration |
9/5 |
1 Demo** |
2 Prep |
1 Report |
Oscilloscope demonstration (**no Labs on Labor Day) |
9/12 |
2 Demo |
3 Prep |
2 Report |
Logic analyzer demonstration |
9/19 |
3 Demo |
4 Prep |
3 Report |
Spectrum analyzer demo |
9/26 |
4 Demo |
5 Prep |
4 Report |
PCB Artist (PCB) demonstration |
10/3 |
5 Demo |
6 Prep |
|
Quiz 1 is 10/7 |
10/10 |
6 Demo, 5 Report |
7f Prep |
6 Report |
|
10/17 |
7 Demo |
8 Prep |
7 Report |
|
10/24 |
|
|
First PCB due |
Rough draft of SCH/PCB files due to TA at 2 pm Friday 10/28 |
10/31 |
8 Demo |
9 Prep |
8 Report |
final SCH/PCB files due to TA at 2 pm Friday 11/4 |
11/7 |
9 Demo |
10 Prep |
9 Report |
Lab 9 report is just the software |
11/14 |
10 Demo |
|
|
Quiz 2 is 11/18 |
11/21 |
11 Prep,10 Report |
no lab Wed or Thur |
|
week of thanksgiving |
11/28 |
|
11 Demo |
11 Report/Expo |
Turn in equipment by 12/2 |
"8 Demo" means your PCB Artist files are delivered to the TA
**No Labor Day lab 9/5 (demo is due by second session)
Prep = you turn in your lab preparation
Demo = you demonstrate your lab to the TA
Partial = you demonstrate first part of a two-week lab to the TA
Report = you turn in your complete lab report to the TA
During the week of 8/29 to 9/1, please go to your
scheduled EE445L lab sessions in ENS252A to get a demonstration of the lab
equipment. If you do not already own a LM3S1968 board, you must purchase
one. Boards can be purchased for $49 using Bevobucks during the first three
days of the semester. Each student should have their own board. The
lab preparations (hardware diagrams and syntax-free software source code
printouts) are due at the beginning of your lab period. In other words, please
type your software into the PC before lab. Attendance in lab is required. All
software for lab, and tests must include comments. All
hardware must include R&C values specifying tolerance and type (e.g., 5%
carbon), and chip numbers (be very specific e.g., INA122P). Pin numbers are
required only for lab, not for the exams.
Students are encouraged to go to the last 1 hour of the
other lab periods, but the first priority will be to the regular students.
During the first 15 minutes of lab, the TA will collect preparations. For the
next 15 minutes, the TA will lead a lab discussion session. The remaining lab
time is available for debugging and lab checkout. At the end of the semester
please verify with the checkout counter that your record is clear. All reports
must be given to the TA by Friday December 2, 2pm.
This is an approximate schedule, please check the
website for the latest version.
Date |
Chapter |
Topic |
8/24-26 |
1, 2, |
Guest lecture, board demo, Arm Cortex M3 architecture, features of the LM3S1968, fixed-point |
8/29 |
2, 3 |
Lab environment, run Lab1 project the real board , example decimal fixed point, debugging techniques, call graphs, flow charts, data flow graphs |
8/31 |
2 |
Run Lab2 project, debugging techniques, and programming style, dumps, monitor |
9/7 |
2,3 |
Draw pictures showing elements on the stack for uVision compiler, show stack frame during interrupt service, debugging from an assembly language perspective, real time systems |
9/9 |
4,5 |
Interface binary switch using pull-up resistor to an input port, draw flowchart of SysTick project, profiling with the scope showing just how small a percentage of time is spent in the background, globals/locals, static variables, threads, draw thread trace |
9/12 |
9 |
Profiling, oLED Displays, blind cycle versus gadfly synchronization, show how to maintain time of day in Timer, allocation of tasks between the foreground and background |
9/14 |
|
|
9/16 |
1,2,9 |
Digital logic, input/output voltage/current, NPN transistor interface of a speaker, capacitive and inductive loads |
9/21 |
4,5 |
Linked data structures, ROM-based structures using const, finite state machines, run Moore project, fixed time delay using Timer interrupts, adding output pins, adding input pins, running the FSM in the background using interrupts |
9/23 |
4, |
FSM with functions, traffic example, stepper motors, full-step versus half-step algorithm, stepper interface electronics (L293, TIP120, IRF540), snubber diodes |
9/26 |
8, 9 |
SSI/DAC interface, signal generation |
9/28 |
7,8,9 |
Timer interrupts, real-time systems, MC34119 audio amplifiers |
9/30 |
9 |
Sound waves |
10/3 |
14, |
Embedded system layout, power, clock, reset, packaging |
10/5 |
9 |
Linear amplifiers, input/output impedance, Quiz1 review |
10/7 |
|
Quiz 1 in ACA1.104, covering material in Labs 1,2,3,4 |
10/10 |
9 |
Resistance bridge,
instrumentation amplifier, Butterworth filters, |
10/12 |
9 |
Data Acquisition Systems, Nyquist Theorem, Aliasing |
10/14 |
10 |
Data Acquisition Systems, FFT |
10/17 |
Lec17.pdf |
Sampling Jitter |
10/19 |
14, Lec18.pdf |
Embedded Systems, power, packaging |
10/21 |
14, |
Low power design |
10/24 |
8 |
Input capture, SCIB virtual serial port |
10/26 |
Lec20.pdf |
Fifo queue analysis and robust software |
10/31 |
Lec21.pdf |
MSP430 |
11/2 |
Lec22.pdf |
Level conversions |
11/4 |
11, Lec23.pdf |
XBee |
11/7 |
11, BardLec |
Wireless communication |
11/9 |
11, BardLec |
XBee |
11/14 |
3,
Lec24 |
I2C |
11/16 |
|
Quiz 2 review |
11/18 |
|
Quiz 2 in ACA1.104, covering material in Labs
5,6,7,8 |
11/21 |
4, 7, 8 |
High speed interfacing, introduction to DSP |
11/23 |
|
No class |
11/28 |
8 |
PWM, DC motor interface |
11/30 |
Lec28 |
Final exam review |
12/2 |
|
Lab 11 Product Demonstrations (third floor of ENS) All Lab reports are due to the TA at 2 pm |
12/2 |
|
Turn in Lab Equipment so that checkout won’t bar your registration |
12/7 |
|
Wednesday, Final exam, 2-5pm, Room regularly scheduled |
Legal Stuff: The 12th class day is September 9. After
this date, I will sign a drop only if the Dean approves it. Your current grade
status must be a "C" or better for you to receive a "Q".
Course evaluation is conducted on the last class day in accordance with the
Measurement and Evaluation Center form. The final exam is at the time and place
stated in the course schedule. The University of Texas at Austin provides upon
request appropriate academic adjustments for qualified students with
disabilities. For more information, contact the Office of the Dean of Students
with Disabilities at 471-6259, 471-4241 TDD.
Scholastic dishonesty: "Faculty in the ECE Department are committed
to detecting and responding to all instances of scholastic dishonesty and will
pursue cases of scholastic dishonesty in accordance with university policy.
Scholastic dishonesty, in all its forms, is a blight
on our entire academic community. All parties in our community -- faculty,
staff, and students -- are responsible for creating an environment that
educates outstanding engineers, and this goal entails excellence in technical
skills, self-giving citizenry, an ethical integrity.
Industry wants engineers who are competent and fully trustworthy, and both
qualities must be developed day by day throughout an entire lifetime.
Scholastic dishonesty includes, but is not limited to, cheating, plagiarism,
collusion, falsifying academic records, or any act designed to give an unfair
academic advantage to the student. The fact that you are in this class as an
engineering student is testament to your abilities. Penalties for scholastic
dishonesty are severe and can include, but are not limited to, a written
reprimand, a zero on the assignment/exam, re-taking the exam in question, an F
in the course, or expulsion from the University. Don't jeopardize your career
by an act of scholastic dishonesty. Details about academic integrity and what
constitutes scholastic dishonesty can be found at the website for the UT Dean
of Students Office and the General Information Catalog, Section
11-802."
You are encouraged to study together and to discuss information and concepts
with other students. You can give "consulting" help to or receive
"consulting" help from such students in oral form. However, this
permissible cooperation should never involve one student having possession of a
copy of all or part of work done by someone else, in the form of an email, an
email attachment file, a portable storage device, or a hard copy. Copying of
any part of a program is cheating without explicit reference to its source. We
do enter lab assignments turned in by EE445L students through a plagiarism
checker, comparing them to assignments of this and previous semesters. If we
find two programs that are copied, there will be a substantial penalty to both
students, e.g., failure in the course. Students who cheat on tests or in lab
will fail. Prosecution of cases is very traumatic to both the student and
instructor. It is appropriate to use software out of the book, class website as
long as all copy-pasted software is explicitly referenced. Copy-pasting
software from current or past students is scholastic dishonesty. Policies
concerning the use of other people's software in this class:
· I strongly encourage you to study existing software.
· All applications and libraries must be legally
obtained. E.g.,
You
may use libraries that came when you bought a compiler.
You may use software obtained
from the web.
You may copy and paste from the
existing source code.
· You may use any existing source code that is clearly
referenced and categorized:
original: completely written by
you,
derived: fundamental approach is
copied but it is your implementation,
modified: source code
significantly edited to serve your purpose,
copied: source code includes
minor modifications.
Request samples (DIP or PDIP package) The parts
labeled 1) 2)... 9) will be requested for you. In other words, we will make one
request for the entire class. However, keep these web sites in mind as you
design your Labs 8, 9,11. Do not order anything now; wait until you design
Lab 8, and then order what you need. You will need to register with an
official University email address (e.g., YourName@mail.utexas.edu) rather than
a junk email address (e.g., aol.com or gmail.com). For general information on
getting free samples, see http://www.ladyada.net/library/procure/samples.html.
http://www.analog.com/en/index.html
Analog Devices
AD8032ANZ rail-to-rail op amp
http://www.maxim-ic.com/ Maxim IC
1) MAX5353ACPA+ or MAX5353BCPA+ single 3.3V-powered, 12-bit SPI interface DAC (ACPA or BCPA)
MAX552BCPA 12-bit multiplying DAC
MAX1246ACPE+ 3.3V-powered, 12-bit ADC, such as the (A or B, with or
without +)
MAX5155ACPE dual 12-bit SPI interface DAC (ACPE or BCPE)
http://www.ti.com
Texas Instruments
2) INA122P rail-to-rail instrumentation amp
3) OPA2350PA rail-to-rail dual op amp
4) LM4041CILPR adjustable shunt reference
5) TLV5616CP 12-bit DAC (or TLV5616IP )
6) LM3S1968-IQC50-A2
TLC2272ACP rail-to-rail dual op amp
TLC2274ACN rail-to-rail quad op amp
http://www.samtec.com/
SamTec connectors
7) BCS-120-L-S-TE (need 1 for the $10 graphics LCD from BG Micro)
8) BCS-114-L-S-TE (need 1 for LCD from checkout)
9) TSW-133-09-F-S-RE, TSW-133-08-F-S-RA, (used for EKK-LM3S1968)
Search engine for parts http://octopart.com/
Game engine http://www.3dgamestudio.com/
Hobby parts http://www.sparkfun.com/
Surplus http://www.allelectronics.com/ http://www.bgmicro.com/
Full line http://www.digikey.com/ http://www.mouser.com/ http://www.newark.com/
Put your embedded system in a box (not free, but a good source for choices)
http://www.okw.co.uk/
OKW Enclosures Ltd
http://www.tekoenclosures.com/ Teko Enclosures Solutions
http://www.pactecenclosures.com/
PacTec Enclosures
Curious about my research? See
http://users.ece.utexas.edu/~valvano/research