| 05/03/2007 | what has priority, interrupt or exceptions |
| 04/17/2007 | Problem 4 |
| 04/17/2007 | the 2 level branch predictor |
| 04/15/2007 | Ooops! I just went back and read our definition of problem 4 |
| 04/15/2007 | The pipeline: stores and branches |
| 04/13/2007 | backup registers |
| 04/11/2007 | The trapvector table is in supervisor space, but TRAP executes in... |
| 04/06/2007 | handling exceptions in the 4th assignment |
| 04/04/2007 | today's class... |
| 04/02/2007 | What is R6? |
| 04/02/2007 | Does SACK serve any useful purpose |
| 04/01/2007 | the answers to Problem 5 |
| 03/31/2007 | replacement bits for a cache entry |
| 03/30/2007 | why does associativity matter |
| 03/28/2007 | final exam schedule |
| 03/25/2007 | seminars |
| 03/24/2007 | one of my TAs just beat me up for not emphasizing some terminology |
| 03/24/2007 | another student follows up... |
| 03/24/2007 | the index bits for accessing the tag store |
| 03/23/2007 | question on multiprocessor use of private cache |
| 03/20/2007 | a question on yesterday's lecture... |
| 03/06/2007 | Will I include the glossary in the exam? |
| 03/05/2007 | P0 space and P1 space and multiple processes ...on the VAX |
| 03/05/2007 | which came first: the interrupt or the page fault? |
| 03/04/2007 | Virtual Memory (a somewhat long complete -- I hope -- picture) |
| 03/03/2007 | Who assigns page frame numbers? |
| 03/03/2007 | what will be provided so we don't have to copy *everything* |
| 03/03/2007 | Some definitions to help you in your studying... |
| 03/03/2007 | To get more points, or not to get more points, that is the question |
| 03/01/2007 | more on unaligned accesses |
| 03/01/2007 | Review session Sunday |
| 02/28/2007 | prepare for the exam |
| 02/27/2007 | another question on interleaving |
| 02/27/2007 | Does the vector load described in class end up with garbage on the bus? |
| 02/26/2007 | 1st or 2nd memory access |
| 02/24/2007 | memory addressiability |
| 02/21/2007 | What does MIO.EN mean? |
| 02/19/2007 | the Ready bit |
| 02/18/2007 | State 20 of the JSRR instruction revisited |
| 02/18/2007 | what goes on in a clock cycle |
| 02/18/2007 | grading of the second program |
| 02/17/2007 | are there choices in the data path? |
| 02/15/2007 | What must be done to read a value in a register? |
| 02/12/2007 | Re: EE 360N: Questions about Lab2 – we did not send out this message to the class, since it deals primary with Lab 2, and the deadline had already passed. |
| 02/04/2007 | BR vs. BRnzp |
| 02/04/2007 | Please disregard my last email message. It could do more harm than good :-) |
| 02/04/2007 | Note! We have asked you to disregard this message! what values are permissible in instructions |
| 01/31/2007 | You MUST protect your files |
| 01/31/2007 | Using linux and using windows |
| 01/29/2007 | What does the compiler know? |
| 01/27/2007 | Big endian, little endian |
| 01/27/2007 | Some assembly language subtleties |
| 01/25/2007 | LEA rises to the surface |
| 01/25/2007 | The assembly process |